MV78100
Hardware Specifications
9.6
AC Electrical Specifications
See Section 9.7, Differential Interface Electrical Characteristics, on page 104 for differential interface
specifications.
9.6.1
Reference Clock and Reset AC Timing Specifications
Table 31: Reference Clock and Reset AC Timing Specifications
Description
Symbol
Min
Max
Units
Notes
Core Reference Clock
Frequency
F
F
25 -
100 ppm
25 +
100 ppm
MHz
%
REF_CLK_SSC
REF_CLK_PT
Clock duty cycle
Slew rate
DC
DC
40
60
REF_CLK_SSC
REF_CLK_PT
SR
SR
0.7
V/ns
ps
1
REF_CLK_SSC
REF_CLK_PT
Pk-Pk jitter
JR
JR
200
REF_CLK_SSC
REF_CLK_PT
Core Reference Clock Spread Spectrum Requirements
Modulation Frequency
Fmod
0
33
0
kHz
%
2
2
REF_CLK_SSC
Modulation Index
Fspread
-0.5
REF_CLK_SSC
Ethernet Reference Clock
Frequency in MII-MAC mode
F
F
2.5 -
100 ppm
25 +
100 ppm
MHz
%
GE0_TXCLK
GE0_RXCLK
MII clock duty cycle
Slew rate
DC
DC
SR
SR
35
65
GE0_TXCLK
GE0_RXCLK
GE0_TXCLK
GE0_RXCLK
0.7
V/ns
1
SMI Master Mode Reference Clock
SMI output MDC clock
F
TCLK/128
MHz
kHz
GE_MDC
TWSI Master Mode Reference Clock
SCK output clock
F
F
TCLK/1600
TWSI0_SCK,
TWSI1_SCK
SPI Output Clock
SPI output clock
F
F
TCLK/30
TCLK/4
MHz
6
7
SPI_SCK
SPI output clock (Integrated with the TDM interface)
TCLK/254 TCLK/10 MHz
TDM_SCLK
MV-S104552-U0 Rev. D
Copyright © 2008 Marvell
Page 70
Document Classification: Proprietary Information
December 6, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
