MV78100
Hardware Specifications
9.5
DC Electrical Specifications
See the Pin Description Section for internal pullup/pulldown,
Note
9.5.1
General 3.3V (CMOS) DC Electrical Specifications
Table 27 is relevant for the following interfaces that only operate at 3.3V:
SPI
JTAG
Table 27 is also relevant if the following interfaces are configured to operate at 3.3V, according to
Section 7.2, Hardware Reset, on page 51.
Device Bus
MPP
RGMII
GMII
MII
SMI
TDM
SYSRSTn
UART
REF_CLK_PT
TCLK_OUT
TCLK_IN
Table 27: General 3.3V Interface (CMOS) DC Electrical Specifications
Parameter
Input low level
Symbol
VIL
Test Condition
Min
-0.3
2.0
-
Typ
Max
Units Notes
0.8
V
V
-
Input high level
VIH
VDDIO+0.3
-
Output low level
Output high level
Input leakage current
Pin capacitance
VOL
IOL = 2 mA
0.4
-
V
-
VOH IOH = -2 mA
2.4
-10
V
-
1, 2
-
IIL
0 < VIN < VDDIO
10
uA
pF
Cpin
5
Notes :
1. While I/O is in High-Z.
2. This current does not include the current flow ing through the pullup/pulldow n resistor.
MV-S104552-U0 Rev. D
Page 66
Copyright © 2008 Marvell
Document Classification: Proprietary Information
December 6, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
