Pin Information
Pin Descriptions
2.2.2
Miscellaneous Pin Assignment
The Miscellaneous signal list contains clocks, reset, and PLL related signals.
Table 4: Miscellaneous Pin Assignments
Pin Name
I/O
Pin
Type
Power
Rail
Description
REF_CLK_SSC
I
CMOS
VDDO_C
25 MHz reference clock input for TCLK PLL and PCLK (CPU core,
Mbus-L, and SDRAM clock) PLL. Supports a SSC source clock.
NOTE: REF_CLK_SSC voltage swing is according to VDDO_C.
REF_CLK_PT
I
CMOS
VDDO_C
25 MHz reference clock input for USB 2.0 PHY, GbE interface,
and SATA PHY. Must be a pure tone clock.
NOTES:
•
If the SSC clock is not required, REF_CLK_PT can be
configured via reset strapping to also drive the PCLK and TCLK
PLLs. In this configuration, tie REF_CLK_SSC to VSS.
REF_CLK_PT voltage swing is according to VDDO_C.
•
SYSRSTn
I
CMOS
CMOS
VDDO_C
System Reset
Main reset signal of the device.
Used to reset all units to their initial state.
NOTE: For reset timing, see in the MV76100, MV78100, and
MV78200 Design Guide.
SYSRST_OUTn
O
See
Open Drain Reset Output
descrpition
Reset request from the device to the board reset logic.
The power rail in use is determined by the MPP pin used for
SYSRST_OUTn:
•
VDDO_B (DEV_AD[21], DEV_AD[24], DEV_AD[29],
DEV_AD[30], DEV_AD[31])
•
VDDO_C (MPP[13])
TCLK_OUT
O
CMOS
CMOS
VDDO_C
VDDO_C
TCLK PLL Output.
NOTES:
•
•
TCLK_OUT pin can be configured to drive a clock running at 1:N
of TCLK rate, rather than TCLK PLL output.
If using an external TCLK_IN core clock input rather than the
internally generated TCLK, leave TCLK_OUT not connected.
TCLK_OUT voltage swing is according to VDDO_C.
TCLK_IN
I
Core Clock Input (150 MHz–200 MHz). An alternative to the
internally generated TCLK. De-skewed inside the chip to 0 skew
between the input to the internal clock tree. Useful for high speed
synchronous interface operation.
NOTES:
•
If using the internally generated TCLK, connect TCLK_IN to
VSS.
•
The TCLK_IN voltage swing is according to VDDO_C.
THERMAL_A
THERMAL_C
I
Analog
Temperature diode anode/cathode
THERMAL_A and THERMAL_C provide connectivity to the on-chip
temperature diode that can be used to determine the die junction
temperature.
NOTE: When unused can be left unconnected.
Copyright © 2008 Marvell
MV-S104552-U0 Rev. D
December 6, 2008, Preliminary
Document Classification: Proprietary Information
Page 21
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
