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LTTB 参数 Datasheet PDF下载

LTTB图片预览
型号: LTTB
PDF下载: 下载PDF文件 查看货源
内容描述: SMBus的VID电压编程器 [SMBus VID Voltage Programmers]
分类和应用:
文件页数/大小: 20 页 / 251 K
品牌: Linear [ Linear ]
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LTC1699 Series  
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APPLICATIO S I FOR ATIO  
Operating Sequence  
• Pull VRON high. Since DCON = 0, the CPU_ON, IO_ON  
and CLK_ON pins enter a high impedance state, allow-  
ing the DC/DC converters to soft-start. PGOOD stays  
low for 50µs.  
A typical control sequence for the LTC1699-80,  
LTC1699-81 and LTC1699-82 is as follows:  
• On power up, the DCON bit is preset to a high state by  
the power-on reset (POR) circuit. The CPU_ON, IO_ON  
and CLK_ON pins are pulled low to shut down the DC/  
DC converters. PGOOD pulls low to indicate that the  
converters are not in regulation.  
• To shut down the supply, send two Off protocols to set  
the DCON bit high or pull VRON low if immediate  
shutdown is required.  
The VRON signal in the 8-pin MSOP versions of the  
LTC1699-80, LTC1699-81 and LTC1699-82 are pulled  
high internally by a 2.5µA current source. For these  
versions, the converters are turned on or off only through  
the SMBus interface.  
• Pull VRON low as a precaution. Take SEL high or low to  
selectthedividersetting;e.g.,onethatsuitstheexisting  
power source (battery or wall-pack).  
• Use the Setup protocol to load the appropriate divider  
settings in Registers 0 and 1 and enable the on/off state  
machine.  
Overvoltage Protection Faults  
Toggling the SEL pin, i.e. changing the ladder setting “on  
the fly” can trigger some converters with over-voltage  
fault protection (OVP) into a fault state if the new setting  
calls for a lower output voltage. For some converters such  
as the LTC1702, cycling the power supply is the only way  
to clear the fault and restore normal operation.  
• Use the Read-Back protocol to verify the contents of  
Registers 0 and 1.  
• Repeat the setup and read-back if the codes are incor-  
rect (due to bus conflicts).  
• Send two On protocols in succession to clear the DCON  
bit.  
For the LTC1702, an OVP fault is triggered if the difference  
between the programmed and prevailing output voltages  
is greater than 15%, and persists for more than 25µs. To  
prevent the OVP fault from disabling the LTC1702, tie the  
FAULT pin of the LTC1702 low. Tying FAULT low does not  
disable the OVP circuit but blocks its effects.  
• Use the Read-Back protocol to verify that the DCON is  
low. AhighstatewillindicatethatanOncommandcode  
was corrupted by bus conflicts.  
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