LTC1622
U
W U U
APPLICATIONS INFORMATION
down to 2.7V. Let’s assume that the MOSFET dissipation
is to be limited to PP = 250mW and its thermal resistance
is 50°C/W. Hence the junction temperature at TA = 25°C
will be 37.5°C and δp = 0.005 (37.5 – 25) = 0.0625. The
required RDS(ON) is then given by:
layout diagram in Figure 6. Check the following in your
layout:
1. IstheSchottkydiodecloselyconnectedbetweenground
at (–) lead of CIN and drain of the external MOSFET?
2. Does the (+) plate of CIN connect to the sense resistor
as closely as possible? This capacitor provides AC
current to the MOSFET.
P
2
P
R
= 0.11Ω
DS(ON)
DC I
1+ δp
(
) (
)
OUT
3. Is the input decoupling capacitor (0.1µF) connected
The P-channel MOSFET requirement can be met by an
Si6433DQ.
closely between VIN (Pin 8) and ground (Pin 6)?
4. Connect the end of RSENSE as close to VIN (Pin 8) as
possible. The VIN pin is the SENSE+ of the current
comparator.
5. Is the trace from the SENSE– (Pin 1) to the Sense
resistor kept short? Does the trace connect close to
The requirement for the Schottky diode is the most strin-
gent when VOUT = 0V, i.e., short circuit. With a 0.025Ω
RSENSE resistor, the short-circuit current through the
Schottky is 0.1/0.025 = 4A. An MBRS340T3 Schottky
diode is chosen. With 4A flowing through, the diode is
rated with a forward voltage of 0.4V. Therefore, the worst-
case power dissipated by the diode is 1.6W. The addition
of DFB (Figure 5) will reduce the diode dissipation to
approximately 0.8W.
RSENSE
?
6. Keep the switching node, SW, away from sensitive
small signal nodes.
7. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of COUT and signal
ground. Optional capacitor C1 should be located as
close as possible to the LTC1622.
The input capacitor requires an RMS current rating of at
least 0.75A at temperature, and COUT will require an ESR
of 0.1Ω for optimum efficiency.
PC Board Layout Checklist
R1andR2shouldbelocatedascloseaspossibletothe
LTC1622. R2 should connect to the output as close to
the load as practicable.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1622. These items are illustrated graphically in the
V
IN
+
R
SENSE
C
IN
1
2
3
4
8
7
6
5
–
SENSE
V
IN
M1
0.1µF
I
TH
PDRV
LTC1622
GND
L1
SW
V
OUT
V
FB
R
ITH
+
C
SYNC/
MODE
OUT
RUN/
SS
C1
C
ITH
C
SS
QUIET SGND
R1
R2
1622 F06
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 6. LTC1622 Layout Diagram (See PC Board Layout Checklist)
12
Linear [ Linear ]
