LTM4641
APPLICATIONS INFORMATION—INPUT PROTECTION FEATURES
R
IN
’s value in place often significantly alters one or both
The LTM4641 powers up its output when the following
conditions are met:
TOV
V referred overvoltage thresholds. It is more efficient to
work through Equations 24 to 27 in the sequence shown
and iterate (if necessary) towards finding convenient (EIA
standard) resistor values.
•ꢀꢀ RUNꢀexceedsꢀ1.25Vꢀ(nominal;ꢀ2V,ꢀovertemperature);ꢀ
power-on reset (POR) and timeout delay times do not
apply to RUN.
The latchoff input overvoltage threshold can be double-
checked with:
•ꢀ Allꢀnonlatchingꢀfault-monitorꢀpinsꢀhaveꢀbeenꢀinꢀtheirꢀ
operationally valid states for the full duration of the
POR delay time, set optionally by C
(the capacitor
TMR
RTOV +RMOV
VOV =UVOVTH •
+1
(28)
on the TMR pin). Explicit pins and operationally valid
thresholds follow:
RBOV
The nonlatching overvoltage threshold can be double-
checked with:
a. DRV > 4.05V. In the circuits of Figures 45 and
CC
46, this is guaranteed for V ≥ 4.5V, minimum. In
INL
Figure 49, this requirement is met when the auxiliary
bias supply exceeds 4.05V.
RTOV
VRT =UVOVTH •
+1
(29)
RMOV +RBOV
(
)
b. UVLO > 500mV
The UVLO, IOVRETRY and OVLO pins do not require any
filter capacitance due to built-in filtering in the LTM4641’s
housekeeping IC. This results in glitch immunity with
characteristics shown in Figure 12.
c. IOVRETRY < 500mV
d. TEMP > 514mV (when OTBH is electrically open
circuit)
•ꢀꢀ Noꢀlatchoffꢀfaultꢀconditionsꢀareꢀpresent,ꢀandꢀtheꢀLTM4641ꢀ
isnotina“latchedoff”statefromanypreviouslydetected
latchoff fault condition. If a latchoff fault condition oc-
curs/occurred,theLTM4641mustbeunlatchedbyalogic
highLATCHsignal:ifalllatchofffault-monitoringpinsare
inoperationallyvalidstateswhenLATCHtransitionsfrom
logic low to high, the LTM4641 becomes immediately
unlatched; if, instead, any latchoff fault-monitoring pin
is outside its operationally valid state when LATCH is
logic high, the LTM4641 becomes unlatched if LATCH
remains logic high after all latchoff fault-monitoring
pins have been in their operationally valid states for the
full duration of the timeout delay time (set optionally by
700
600
RESPECTIVE
500
400
300
200
100
0
FAULT CONDITION
BECOMES DETECTED
GLITCH
IGNORED
0.1
1
10
100
COMPARATOR OVERDRIVE PAST THRESHOLD (%)
4641 F12
Figure 12. Transient Duration vs Coꢃparator Overdrive
Glitch Iꢃꢃunity Characteristics. ꢁonitored Signals: UVLO,
IOVRETRY, OVLO, TEꢁP, CROWBAR and DRVCC
C
). Explicit pins and operationally valid thresholds
TMR
follow:
a. OVLO < 500mV
Start-Up/Shutdown and Run Enable; Power-On Reset
and Tiꢃeout Delay Tiꢃe
b. TEMP > 514mV (when OTBH is logic low)
c. CROWBAR < 1.5V
The LTM4641 is a feature-rich and versatile self-contained
DC/DC converter system, and includes multiple on-board
supply monitors. The inputs to several monitors are avail-
able to the user for system customization (UVLO, OVLO,
IOVRETRY and TEMP).
The POR and timeout delay time is 9ms per nanofarad
of C
capacitance. If C
is not used, the POR and
TMR
TMR
timeout delay time is ~90μs.
4641f
31
Linear [ Linear ]
