LTM4641
APPLICATIONS INFORMATION—POWER SUPPLY FEATURES
pin to the MOSFET driver circuitry. In most cases, connect
IntheexamplecircuitofFigure7, themasterrailgenerated
byU1rampsupitsoutputto1.8V.Theratiometric-tracking
rail is generated by U3 and has a nominal FS output volt-
INTV to DRV . The INTV regulator can source up to
CC
CC
CC
30mA,continuous,whichissufficientforpoweringDRV ,
CC
even at the LTM4641’s highest recommended switching
age of 1.5V. Values of R and R
are determined such
TAR
TBR
frequency (6V
condition).
that when U1’s output reaches its final value, 1.8V, the
OUT
TRACK/SS pin of U3 reaches ~600mV: choosing R
to
TBR
The power loss in the LDO can be considerable at high
input voltage, given by:
be 10kΩ yields R ꢀ=ꢀ(1.8V/0.6Vꢀ–ꢀ1)ꢀ•ꢀ10kΩ,ꢀorꢀ~20kΩ.ꢀ
TAR
It is common to choose resistor values of 10k or less for
this task, so that errors introduced by the 1µA current
source on TRACK/SS are sufficiently small.
P
= (V ꢀ–ꢀ5.3V)ꢀ•ꢀ(5mAꢀ+ꢀI
) (19)
DRVCC
LOSS(INTVCC_LDO)
INL
This power loss can be virtually eliminated when a ~5V
to 6V rail is available to overdrive the INTV /DRV pins
Figure 8 shows an oscilloscope snapshot of the output
voltage waveforms of the modules configured per the
CC
CC
throughaSchottkydiode,asshownintheFigure51circuit.
This is because the LDO can only pull INTV ’s voltage
Figure 7 circuit, with 6Ω load on V
and no load
CC
OUT_MASTER
in an upward direction—that is to say, the series-pass
on the V
and V
outputs.
OUT_SLAVE_C
OUT_SLAVE_R
element turns off when INTV exceeds the LDO control
CC
loop’s regulation setpoint. Infrared thermal images in
Figures 52 to 55 illustrate operating conditions in which
up to ~5°C reduction in package surface temperature is
obtainedbyemployingthistechnique.Notetheimportance
U1 V
OUT
1V/DIV
U2 V
1V/DIV
OUT
to provide a diode-ORed path from V to V and from
IN
INL
INTV /DRV to V when INTV /DRV is overdriven
U3 V
1V/DIV
CC
CC
INL
CC
CC
OUT
byanauxiliaryrail(orV ). ThisassuresproperMOSFET
OUT
RUN
5V/DIV
driver behavior regardless of disappearance/appearance
4641 F08
2ms/DIV
of V versus V , in any combination or sequence of
INL
AUX
rail ramp-up/ramp-down events. The series-connected
Figure 8. Output Voltage Waveforꢃs of U1, U2 and U3. cf.
Figure 7 Circuit.
Schottky diode internal to the LTM4641 that feeds the
LDOfromV assuresproperMOSFETdriverandinternal
INL
logic behavior, even in the event of rapid discharging and
Forapplicationsthatdonotrequiretrackingorsequencing,
applying at least 100pF on the TRACK/SS pin is recom-
mended, corresponding to ~60μs output voltage start-up
ramptime.Theresultingsoft-startperiodwilllimitstart-up
input surge current and output voltage overshoot.
restoration of V
.
INL
A housekeeping circuit that monitors DRV voltage in-
CC
hibits switching action until DRV exceeds 4.05V. Once
CC
switching action commences, DRV is allowed to fall
CC
to 3.35V before switching action is inhibited. The DRV
CC
INTV and DRV
CC
CC
voltage monitor has glitch immunity characteristics as
shown in Figure 12.
The LTM4641 module has an internal 5.3V low dropout
regulator whose input is fed from the low current input
DRV current is proportional to switching frequency. For
CC
voltage bias pin, V , through a Schottky diode. The out-
INL
applications with extremely fast output voltage start-up
put, INTV , is used to power control and housekeeping
CC
(e.g., C < 100pF on TRACK/SS, or rail tracking very fast
SS
circuitry and the MOSFET drivers, and is up-and-running
railswithsub60μsturn-ontime),switchingfrequencymay
wheneverbiasonV ispresent.DRV isthepowerinput
INL
CC
4641f
27
Linear [ Linear ]
