LTM4641
APPLICATIONS INFORMATION—INPUT PROTECTION FEATURES
1000000
100000
10000
1000
are not suitable. For example, it can be convenient to ap-
ply customized UVLO settings to inhibit switching prior to
enteringaregionofpossibledropoutoperation(Figure51).
It may be desirable to set a very large UVLO hysteresis,
if line sag is problematic. UVLO is highly recommended
to be customized to monitor the source supply feeding
0.95
0.85
0.75
0.65
0.55
0.45
0.35
0.25
V
when V is biased from an auxiliary rail (Figure 49).
INH
INL
The UVLO pin input may also be used to provide novel
circuit solutions such as one found in Figure 47: to detect
anovertemperatureeventinMSP—sensedviaanexternal
NTC in close proximity to the power interrupt MOSFET,
MSP;andtorespondtoMSPovertemperaturebyinhibiting
switching action and turning off MSP until the MOSFET
returns to normal temperatures.
–55 –15
25
65
105
145
185
JUNCTION TEMPERATURE (°C)
4641 F10
Figure 10. Relationship of NTC Resistance to Junction
Teꢃperature and Resulting TEꢁP Voltage. Curves for
Noꢃinal Values and Calculated Eꢂtreꢃe Values Shown
IOVRETRY is primarily used to set the input voltage (V )
IN
Input ꢁonitoring Pins: UVLO, IOVRETRY, OVLO
threshold above which switching action is inhibited, but
not latch off. OVLO is primarily used to set the input volt-
The UVLO pin feeds directly into the inverting input of a
comparator whose trip threshold is 0.5V. The behavior
of the UVLO pin is an example of a nonlatching fault:
when the UVLO pin falls below 0.5V, HYST is pulled low
and switching action is inhibited; when the UVLO pin
exceeds 0.5V, HYST goes logic high and switching action
can resume. The IOVRETRY and OVLO pins each feed
directly into noninverting inputs of comparators whose
trip thresholds are 0.5V. The behavior of the IOVRETRY
pin is also an example of a nonlatching fault pin: when
the IOVRETRY pin exceeds 0.5V, HYST is pulled low and
switching action is inhibited; when IOVRETRY falls below
0.5V, switching action can resume. The behavior of the
OVLO pin is an example of a latchoff fault pin: when the
OVLO pin exceeds 0.5V, HYST is pulled low and switching
action is inhibited; when OVLO subsequently falls below
0.5V, HYST remains latched low, and switching action
cannot occur until the latch has been reset. Restarting
regulation after a latchoff event has occurred is explained
in detail in the Start-Up/Shutdown section.
age (V ) threshold above which switching action latches
IN
off. Just as the UVLO pin can be used in versatile ways,
so can IOVRETRY and OVLO.
Consult Appendix A to see the UVLO/IOVRETRY/OVLO
pins’ functions in greater detail.
The most common arrangement of components connect-
ing V to UVLO, HYST, IOVRETRY and OVLO is shown
IN
in Figure 11.
V
IN
C
+
IN(MLCC)
10µF
C
IN(BULK)
×2
V
INH
V
INL
R
R
TUV
BUV
UVLO < 0.5V = OFF
UVLO
LTM4641
HYST
R
HYST
HYST PULLS UP WHEN
ON, HYST PULLS DOWN
WHEN OFF
R
R
R
TOV
MOV
BOV
IOVRETRY > 0.5V = OFF
IOVRETRY
OVLO > 0.5V = LATCHOFF
OVLO
SGND
These three pins give added flexibility to tailor some be-
haviors of the LTM4641. The UVLO pin input is primarily
used to set customized UVLO rising and UVLO falling
thresholds, utilizing a high impedance connection to the
HYST pin to obtain hysteresis. There are times when the
LTM4641’sdefaultUVLOrisingandUVLOfallingthresholds
of 4.5V rising (maximum) and 4V falling (maximum)
GND
4641 F11
SGND CONNECTS TO GND INTERNAL TO MODULE.
KEEP SGND ROUTES/PLANES SEPARATE FROM GND
ON MOTHERBOARD
Figure 11. Setting the LTꢁ4641 Custoꢃ UVLO Rising and
UVLO Falling Thresholds, Nonlatching Input Overvoltage
Threshold, and Latching Input Overvoltage Threshold
IN
IN
4641f
29
Linear [ Linear ]
