LTC1400
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
(Note 7)
Output Source Current
Output Sink Current
V
OUT
= 0V
V
OUT
= V
CC
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C unless otherwise noted. (Note 5)
CONDITIONS
V
CC
= 4.75V, I
O
= 160μA
V
CC
= 4.75V, I
O
= 1.6mA
V
OUT
= 0V to V
CC
●
●
TI I G CHARACTERISTICS
SYMBOL
t
CONV
t
ACQ
f
CLK
t
CLK
t
WK(NAP)
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
f
SAMPLE(MAX)
Maximum Sampling Frequency
Conversion Time
Acquisition Time
CLK Frequency
CLK Pulse Width
Time to Wake Up from Nap Mode
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C unless otherwise noted. (Note 5)
PARAMETER
CONDITIONS
(Note 6)
f
CLK
= 6.4MHz
(Unipolar Mode)
(Bipolar Mode V
SS
= –5V)
(Note 7)
●
●
●
●
●
CLK Pulse Width to Return to Active Mode
CONV↑ to CLK↑ Setup Time
CONV↑ After Leading CLK↑
CONV Pulse Width
Time from CLK↑ to Sample Mode
Aperture Delay of Sample-and-Hold
Minimum Delay Between Conversion
Delay Time, CLK↑ to D
OUT
Valid
Delay Time, CLK↑ to D
OUT
Hi-Z
Time from Previous Data Remains Valid After CLK↑
Minimum Time between Nap/Sleep Request to Wake Up Request
(Unipolar Mode)
(Bipolar Mode V
SS
= –5V)
C
LOAD
= 20pF
C
LOAD
= 20pF
C
LOAD
= 20pF
(Notes 7, 12)
(Note 11)
(Note 7)
Jitter < 50ps (Note 7)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to GND.
Note 3:
When these pin voltages are taken below V
SS
(ground for unipolar
mode) or above V
CC
, they will be clamped by internal diodes. This product
can handle input currents greater than 40mA below V
SS
(ground for
unipolar mode) or above V
CC
without latch-up.
Note 4:
When these pin voltages are taken below V
SS
(ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 40mA below V
SS
(ground for unipolar mode)
without latch-up. These pins are not clamped to V
CC
.
Note 5:
V
CC
= 5V, f
SAMPLE
= 400kHz, t
r
= t
f
= 5ns unless otherwise
specified.
Note 6:
Recommended operating conditions.
4
U
U
MIN
TYP
0.05
0.10
15
–10
10
MAX
0.4
±10
UNITS
V
V
μA
pF
mA
mA
UW
MIN
400
TYP
MAX
2.1
UNITS
kHz
μs
ns
ns
MHz
ns
ns
ns
ns
ns
ns
230
200
0.1
50
350
50
80
0
50
80
45
265
235
40
40
14
50
25
300
270
6.4
(Notes 7, 12)
(Note 7)
●
●
●
●
●
ns
65
385
355
80
80
ns
ns
ns
ns
ns
ns
ns
●
●
●
●
●
●
●
Note 7:
Guaranteed by design, not subject to test.
Note 8:
Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
Note 9:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 10:
Bipolar offset is the offset voltage measured from –0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 11:
The rising edge of CONV starts a conversion. If CONV returns
low at a bit decision point during the conversion, it can create small errors.
For best performance ensure that CONV returns low either within 120ns
after conversion starts (i.e., before the first bit decision) or after the 14
clock cycle. (Figure 13 Timing Diagram).
Note 12:
If this timing specification is not met, the device may not respond
to a request for a conversion. To recover from this condition a NAP
request is required.
1400fa
LINER [ LINEAR TECHNOLOGY ]
