SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
(continued)
Parameter
-12
-15
-20
Symbol
Parameter Description
Min Max Min Max Min Max Unit
tPDL
Input, I/O, or Feedback to Output Through
Transparent Input or Output Latch
14
15
17
18
22
23
ns
ns
ns
ns
ns
tSIR
tHIR
tICO
tICS
Input Register Setup Time
2
2
2
2
3
Input Register Hold Time
2.5
Input Register Clock to Combinatorial Output
Input Register Clock to Output Register Setup
D-type
T-type
LOW
12
13
6
15
16
6
20
21
8
ns
ns
Input Register Clock Width
tWICL
tWICH
fMAXIR
HIGH
6
6
8
ns
Maximum Input Register Frequency 1/(tWICL + tWICH
)
83.3
83.3
62.5
MHz
tSIL
tHIL
tIGO
tIGOL
Input Latch Setup Time
2
2
2
2
3
ns
ns
ns
Input Latch Hold Time
2.5
Input Latch Gate to Combinatorial Output
17
19
20
22
25
27
Input Latch Gate to Output Through Transparent
Output Latch
ns
ns
ns
Setup Time from Input, I/O, or Feedback Through
Transparent Input Latch to Product Term Output
Latch Gate
tSLLA
tIGSA
tSLLS
tIGSS
7
7
8
8
10
10
Input Latch Gate to Output Latch Setup Using
Product Term Output Latch Gate
Setup Time from Input, I/O, or Feedback Through
Transparent Input Latch to Global Output Latch Gate
9
12
16
15
21
ns
ns
Input Latch Gate to Output Latch Setup Using Global
Output Latch Gate
13
tWIGL
tPDLL
Input Latch Gate Width LOW
6
6
8
ns
Input, I/O, or Feedback to Output Through Transparent
Input and Output Latches
16
16
19
20
24
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAR
tARW
tARR
tAP
Asynchronous Reset to Registered or Latched Output
Asynchronous Reset Width (Note 1)
12
8
15
10
20
15
Asynchronous Reset Recovery Time (Note 1)
Asynchronous Preset to Registered or Latched Output
Asynchronous Preset Width (Note 1)
16
20
25
tAPW
tAPR
tEA
12
8
15
10
2
20
15
2
Asynchronous Preset Recovery Time (Note 1)
Input, I/O, or Feedback to Output Enable (Note 3)
Input, I/O, or Feedback to Output Disable (Note 3)
2
12
12
15
15
20
20
tER
2
2
2
Notes:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
where frequency may be affected.
2. See Switching Test Circuit for test conditions. Switching waveforms illustrate true clocks only. Switching waveforms can be
used to illustrate both synchronous and asynchronous clock timing. For example, tSS is the tS parameter for synchronous
clocks and tSAis the tS parameter for asynchronous clocks.
3. Parameters measured with 16 outputs switching.
14
MACH215-12/15/20 (Com’l)
LATTICE [ LATTICE SEMICONDUCTOR ]
