DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LVPECL
The LatticeECP/EC devices support differential LVPECL standard. This standard is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The LVPECL input standard
is supported by the LVDS differential input buffer. The scheme shown in Figure 3-3 is one possible solution for
point-to-point signals.
Figure 3-3. Differential LVPECL
3.3V
100 ohms
+
~150 ohms
100 ohms
3.3V
-
100 ohms
Off-chip
Transmission line, Zo = 100 ohm differential
Table 3-3. LVPECL DC Conditions1
Over Recommended Operating Conditions
Parameter
Description
Output impedance
Typical
100
Units
ohm
ohm
ohm
V
Z
OUT
R
R
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
150
P
100
T
V
V
V
V
2.03
1.27
0.76
1.65
85.7
12.7
OH
OL
OD
CM
BACK
V
Output differential voltage
Output common mode voltage
Back impedance
V
V
Z
ohm
mA
I
DC output current
DC
1. For input buffer, see LVDS table.
For further information about LVPECL, BLVDS and other differential interfaces please see the list of technical infor-
mation at the end of this data sheet.
3-10
LATTICE [ LATTICE SEMICONDUCTOR ]
