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LC4256ZC-75TN100C 参数 Datasheet PDF下载

LC4256ZC-75TN100C图片预览
型号: LC4256ZC-75TN100C
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V / 2.5V / 1.8V在系统可编程超快高密度可编程逻辑器件 [3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 99 页 / 451 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Lattice Semiconductor  
ispMACH 4000V/B/C/Z Family Data Sheet  
Signal Descriptions  
Signal Names  
Description  
TMS  
Input – This pin is the IEEE 1149.1 Test Mode Select input, which is used to control  
the state machine.  
TCK  
Input – This pin is the IEEE 1149.1 Test Clock input pin, used to clock through the  
state machine.  
TDI  
Input – This pin is the IEEE 1149.1 Test Data In pin, used to load data.  
Output – This pin is the IEEE 1149.1 Test Data Out pin used to shift data out.  
TDO  
GOE0/IO, GOE1/IO  
These pins are configured to be either Global Output Enable Input or as general I/O  
pins.  
GND  
NC  
Ground  
Not Connected  
V
The power supply pins for logic core and JTAG port.  
These pins are configured to be either CLK input or as an input.  
The power supply pins for each I/O bank.  
CC  
CLK0/I, CLK1/I, CLK2/I, CLK3/I  
, V  
V
CCO0 CCO1  
Input/Output1 – These are the general purpose I/O used by the logic array. y is GLB  
reference (alpha) and z is macrocell reference (numeric). z: 0-15.  
ispMACH 4032  
ispMACH 4064  
ispMACH 4128  
ispMACH 4256  
ispMACH 4384  
ispMACH 4512  
y: A-B  
y: A-D  
yzz  
y: A-H  
y: A-P  
y: A-P, AX-HX  
y: A-P, AX-PX  
1. In some packages, certain I/Os are only available for use as inputs. See the signal connections table for details.  
ispMACH 4000V/B/C ORP Reference Table  
4032V/B/C  
4064V/B/C  
4128V/B/C  
64  
923 96  
4256V/B/C  
4384V/B/C  
4512V/B/C  
301  
32 302 32  
64  
64  
16  
964  
128  
16  
160  
16  
128 192 128  
208  
16  
Number of I/Os  
Number of GLBs  
2
2
4
8
4
8
4
8
8
8
16  
16  
8
16  
8
16  
8
Number of I/Os /  
GLB  
Mixture  
16  
16  
16  
8
12 12  
4
8
8
10  
of 8 & 45  
8 I/Os /  
GLB  
4 I/Os /  
GLB  
Reference ORP  
Table  
16 I/Os /  
GLB  
8 I/Os / 16 I/Os / 8 I/Os / 12 I/Os / 4 I/Os / 8 I/Os / 8 I/Os / 10 I/Os / 8 I/Os / 8 I/Os /  
GLB  
GLB  
GLB  
GLB  
GLB  
GLB  
GLB  
GLB  
GLB  
GLB  
1. 32-macrocell device, 44 TQFP: 2 GLBs have 15 out of 16 I/Os bonded out.  
2. 64-macrocells device, 44 TQFP: 2 GLBs have 7 out of 8 I/Os bonded out.  
3. 128-macrocell device, 128 TQFP: 4 GLBs have 11 out of 12 I/Os  
4. 256-macrocell device, 144 TQFP: 16 GLBs have 6 I/Os per  
5. 512-macrocell device: 20 GLBs have 8 I/Os per, 12 GLBs have 4 I/Os per  
ispMACH 4000Z ORP Reference Table  
4032Z  
4064Z  
4128Z  
4256Z  
Number of I/Os  
32  
32  
4
64  
4
64  
8
96  
8
64  
16  
4
961  
16  
8
128  
16  
8
Number of GLBs  
Number of I/Os / GLB  
2
16  
8
16  
8
12  
16 I/Os /  
GLB  
8 I/Os /  
GLB  
16 I/Os /  
GLB  
8 I/Os /  
GLB  
12 I/Os /  
GLB  
4 I/Os /  
GLB  
8 I/Os /  
GLB  
8 I/Os /  
GLB  
Reference ORP Table  
1. 256-macrocell device, 132 csBGA: 16 GLBs have 6 I/Os per  
42  
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