Architecture
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
Figure 2-38. LatticeECP2M Banks
TOP
SERDES
Quad
SERDES
Quad
Bank 0
Bank 1
V
CCIO2
V
V
CCIO7
REF1(2)
V
V
REF1(7)
REF2(7)
GND
REF2(2)
GND
V
V
CCIO3
V
REF1(3)
V
V
V
V
CCIO6
REF2(3)
GND
REF1(6)
REF2(6)
GND
V
CCIO8
GND
Bank 5
Bank 4
SERDES
Quad
SERDES
Quad
BOTTOM
LatticeECP2/M devices contain two types of sysI/O buffer pairs.
1. Top (Bank 0 and Bank 1) sysI/O Buffer Pairs (Single-Ended Outputs Only)
The sysI/O buffer pairs in the top banks of the device consist of two single-ended output drivers and two sets of
single-ended input buffers (both ratioed and referenced). One of the referenced input buffers can also be con-
figured as a differential input.
The two pads in the pair are described as “true” and “comp”, where the true pad is associated with the positive
side of the differential input buffer and the comp (complementary) pad is associated with the negative side of
the differential input buffer.
2. Bottom (Bank 4 and Bank 5) sysI/O Buffer Pairs (Single-Ended Outputs Only)
The sysI/O buffer pairs in the bottom banks of the device consist of two single-ended output drivers and two
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LATTICE [ LATTICE SEMICONDUCTOR ]
