Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-20E/SE Logic Signal Connections: 256 fpBGA (Cont.)
LFE2-20E/SE
Ball
Number
Ball Number
J13
Ball/Pad Function
PR28B
PR28A
PR27B
GNDIO3
PR27A
PR22B
VCCIO3
PR22A
PR21B
PR21A
PR19B
GNDIO2
PR19A
PR17B
PR18B
PR17A
VCCIO2
PR18A
PR16B
PR16A
GNDIO2
PR14B
PR15B
PR14A
PR15A
VCCIO2
PR13B
PR13A
PR6B
Bank
3
3
3
-
Dual Function
Differential
J13
RLM0_GDLLC_FB_A/RDQ25
RLM0_GDLLT_FB_A/RDQ25
RLM0_GDLLC_IN_A**/RDQ25
C
T
J12
J12
H12
GND
H13
H15
VCCIO
H16
H11
J11
H12
C (LVDS)*
GND
H13
3
3
3
3
3
3
2
-
RLM0_GDLLT_IN_A**/RDQ25
VREF2_3/RDQ25
T (LVDS)*
C
H15
VCCIO
H16
VREF1_3/RDQ25
PCLKC3_0/RDQ25
PCLKT3_0/RDQ25
PCLKC2_0/RDQ16
T
H11
C (LVDS)*
T (LVDS)*
C
J11
G16
GND
G15
F15
G16
GND
G15
F15
2
2
2
2
2
2
2
2
-
PCLKT2_0/RDQ16
RDQ16
T
C
C (LVDS)*
T
G11
F14
G11
F14
RDQ16
RDQ16
VCCIO
F12
VCCIO
F12
RDQ16
RDQ16
T (LVDS)*
C (LVDS)*
T (LVDS)*
G14
G13
GND
F16
G14
G13
GND
F16
RDQS16
2
2
2
2
2
2
2
2
2
-
RDQ16
RDQ16
RDQ16
RDQ16
C (LVDS)*
F9
F9
C
T (LVDS)*
T
E16
E16
F10
F10
VCCIO
D16
D15
C15
C16
GND
D14
B16
VCCIO
D16
RDQ16
RDQ16
RDQ8
C
D15
T
C (LVDS)*
C
C15
C16
PR7B
RDQ8
GND
D14
GNDIO2
PR6A
2
2
2
2
2
1
1
-
RDQ8
RDQ8
T (LVDS)*
T
B16
PR7A
F13
F13
PR2B
VREF2_2
C (LVDS)*
VCCIO
E13
VCCIO
E13
VCCIO2
PR2A
VREF1_2
VREF2_1
VREF1_1
T (LVDS)*
F11
F11
PT64B
PT64A
GNDIO1
PT63B
PT62B
PT63A
C
T
E11
E11
GND
A15
GND
A15
1
1
1
C
C
T
E12
E12
B15
B15
4-43
LATTICE [ LATTICE SEMICONDUCTOR ]
