Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-20E/SE Logic Signal Connections: 256 fpBGA (Cont.)
LFE2-20E/SE
Ball
Number
Ball Number
J1
Ball/Pad Function
PL31A
PL30B
VCCIO6
PL31B
GNDIO6
PL38A
PL39A
PL38B
PL39B
VCCIO6
PL40A
PL41A
PL40B
PL41B
GNDIO6
PL43A
PL42A
PL43B
VCCIO6
PL42B
PL44A
GNDIO6
PL44B
TDI
Bank
6
6
6
6
-
Dual Function
Differential
T
J1
LLM0_GPLLT_FB_A/LDQ34
LLM0_GPLLC_IN_A**/LDQ34
K3
K3
C (LVDS)*
VCCIO
J2
VCCIO
J2
LLM0_GPLLC_FB_A/LDQ34
C
GND
L2
GND
L2
6
6
6
6
6
6
6
6
6
-
LDQ42
LDQ42
LDQ42
LDQ42
T (LVDS)*
K2
K2
T
C (LVDS)*
C
L3
L3
K1
K1
VCCIO
L4
VCCIO
L4
LDQ42
LDQ42
LDQ42
LDQ42
T (LVDS)*
L1
L1
T
C (LVDS)*
C
L5
L5
M1
GND
N1
M1
GND
N1
6
6
6
6
6
6
-
LDQ42
LDQS42
LDQ42
T
T (LVDS)*
C
N2
N2
P1
P1
VCCIO
P2
VCCIO
P2
LDQ42
LDQ42
C (LVDS)*
T (LVDS)*
R1
R1
GND
R2
GND
R2
6
-
LDQ42
C (LVDS)*
N4
N4
M4
P3
M4
TCK
-
P3
TDO
-
N3
N3
TMS
-
K7
K7
VCCJ
-
M5
K6
M5
PB2A
5
5
5
5
5
5
5
5
5
5
5
5
5
5
VREF2_5/BDQ6
BDQ6
T
K6
PB3A
M6
R3
M6
PB2B
VREF1_5/BDQ6
BDQ6
C
T
R3
PB5A
P4
P4
PB5B
BDQ6
C
-
VCC
GND
N5
VCCIO
GNDIO5
PB30A
PB30B
PB31A
PB32A
VCCIO5
PB31B
PB32B
-
N5
BDQ33
BDQ33
BDQ33
BDQ33
T
C
T
T
N6
N6
T2
T2
P6
P6
VCCIO
T3
VCCIO
T3
BDQ33
BDQ33
C
C
R6
R6
4-40
LATTICE [ LATTICE SEMICONDUCTOR ]
