Specifications ispGDX80VA
Boundary Scan (Continued)
The ispJTAG programming is accomplished by execut- Downlowad (ispDCD™), ispCODE ‘C’ routines or any
ing Lattice private instructions under the Boundary Scan third-party programmers. Contact Lattice Technical Sup-
State Machine.
port to obtain more detailed programming information.
Details of the programming sequence are transparent to
the user and are handled by Lattice ISP Daisy Chain
Figure 11. Boundary Scan Register Circuit for Input-Only Pins
Input Pin
SCANIN
(from previous
cell
SCANOUT
(to next cell)
D
Q
Shift DR
Clock DR
Figure 12. Boundary Scan State Machine
Test-Logic-Reset
0
1
1
1
1
Select-DR-Scan
Select-IR-Scan
Run-Test/Idle
0
0
0
1
1
Capture-DR
Capture-IR
0
Shift-DR
1
0
Shift-IR
1
0
0
Exit1-DR
0
Exit1-IR
0
1
0
1
Pause-DR
1
Pause-IR
1
0
0
0
Exit2-DR
Exit2-IR
1
1
Update-DR
Update-IR
1
0
1
0
22
LATTICE [ LATTICE SEMICONDUCTOR ]
