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IC42S16400F-6TL 参数 Datasheet PDF下载

IC42S16400F-6TL图片预览
型号: IC42S16400F-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: 1梅格位×16位× 4银行( 64兆位)同步动态RAM [1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 55 页 / 822 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S16400F  
IC42S16400F  
BURST TERMINATE  
AUTOꢀPRECHARGEꢀdoesꢀnotꢀapplyꢀexceptꢀinꢀfull-pageꢀ  
burstꢀ mode.ꢀ Uponꢀ completionꢀ ofꢀ theꢀ READꢀ orWRITEꢀ  
burst, a precharge of the bank/row that is addressed is  
automatically performed.  
TheBURSTꢀTERMINATEcommandforciblyterminatesꢀ  
the burst read and write operations by truncating either  
fixed-lengthꢀ orꢀ full-pageꢀ burstsꢀ andꢀ theꢀ mostꢀ recentlyꢀ  
registeredꢀREADꢀorWRITEꢀcommandꢀpriorꢀtoꢀtheꢀBURSTꢀ  
TERMINATE.  
AUTO REFRESH COMMAND  
COMMAND INHIBIT  
COMMANDꢀINHIBITꢀpreventsꢀnewꢀcommandsꢀfromꢀbeingꢀ  
executed.ꢀOperationsꢀinꢀprogressꢀareꢀnotꢀaffected,ꢀapartꢀ  
fromꢀwhetherꢀtheꢀCLKꢀsignalꢀisꢀenabled  
ThisꢀcommandꢀexecutesꢀtheꢀAUTOꢀREFRESHꢀoperation.ꢀ  
Theꢀrowꢀaddressꢀandꢀbankꢀtoꢀbeꢀrefreshedꢀareꢀautomaticallyꢀ  
generatedduringthisoperation.ꢀ Thestipulatedperiod(tr c )is  
required for a single refresh operation, and no other com-  
mandscanbeexecutedduringthisperiod.ꢀ Thiscommandisꢀ  
executedꢀatꢀleastꢀ4096ꢀtimesꢀeveryꢀ64ms.ꢀDuringꢀanꢀAUTOꢀ  
REFRESHꢀcommand,ꢀaddressꢀbitsꢀareꢀ“Don’tꢀCare”.ꢀThisꢀ  
commandꢀcorrespondsꢀtoꢀCBRꢀAuto-refresh.  
NO OPERATION  
When CSꢀisꢀlow,ꢀtheꢀNOPꢀcommandꢀpreventsꢀunwantedꢀ  
commands from being registered during idle or wait  
states.  
SELF REFRESH  
LOAD MODE REGISTER  
DuringtheSELFREFRESHoperation,therowaddresstoꢀ  
be refreshed, the bank, and the refresh interval are gen-  
eratedꢀautomaticallyꢀinternally.ꢀSELFꢀREFRESHꢀcanꢀbeꢀ  
usedtoretaindataintheSDRAMwithoutexternalclocking,ꢀ  
evenꢀifꢀtheꢀrestꢀofꢀtheꢀsystemꢀisꢀpoweredꢀdown.ꢀTheꢀSELFꢀ  
REFRESHꢀoperationꢀisꢀstartedꢀbyꢀdroppingꢀtheꢀCKEꢀpinꢀ  
fromHIGHtoLOW.ꢀDuringꢀtheꢀSELFꢀREFRESHꢀoperationꢀ  
allꢀotherꢀinputsꢀtoꢀtheꢀSDRAMꢀbecomeꢀ“Don’tꢀCare”.ꢀTheꢀ  
device must remain in self refresh mode for a minimum  
period equal to tr a s or may remain in self refresh mode  
forꢀanꢀindefiniteꢀperiodꢀbeyondꢀthat.TheꢀSELF-REFRESHꢀ  
operationꢀcontinuesꢀasꢀlongꢀasꢀtheꢀCKEꢀpinꢀremainsꢀLOWꢀ  
andꢀthereꢀisꢀnoꢀneedꢀforꢀexternalꢀcontrolꢀofꢀanyꢀotherꢀpins.ꢀ  
Theꢀnextꢀcommandꢀcannotꢀbeꢀexecutedꢀuntilꢀtheꢀdeviceꢀ  
internal recovery period (tr c )ꢀ hasꢀ elapsed.ꢀ Onceꢀ CKEꢀ  
goesꢀHIGH,ꢀtheꢀNOPꢀcommandꢀmustꢀbeꢀissuedꢀ(minimum  
of two clocks) to provide time for the completion of any  
internal refresh in progress. After the self-refresh, since it  
is impossible to determine the address of the last row to  
berefreshed,anAUTO-REFRESHshouldimmediatelybeꢀ  
performed for all addresses.  
DuringꢀtheꢀLOADꢀMODEꢀREGISTERꢀcommandꢀtheꢀmodeꢀ  
registerꢀisꢀloadedꢀfromꢀA0-A11.ꢀꢀThisꢀcommandꢀcanꢀonlyꢀ  
be issued when all banks are idle.  
ACTIVE COMMAND  
Whenꢀ theꢀ ACTIVEꢀ COMMANDꢀ isꢀ activated,ꢀ BA0,ꢀ BA1ꢀ  
inputs selects a bank to be accessed, and the address  
inputsꢀonꢀA0-A11ꢀselectsꢀtheꢀrow.ꢀꢀꢀUntilꢀaꢀPRECHARGEꢀ  
command is issued to the bank, the row remains open  
for accesses.  
Integrated Silicon Solution, Inc. — www.issi.com  
5
Rev. A  
03/19/08