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IC42S16100E-6TL 参数 Datasheet PDF下载

IC42S16100E-6TL图片预览
型号: IC42S16100E-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-50]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 81 页 / 1082 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
 浏览型号IC42S16100E-6TL的Datasheet PDF文件第11页浏览型号IC42S16100E-6TL的Datasheet PDF文件第12页浏览型号IC42S16100E-6TL的Datasheet PDF文件第13页浏览型号IC42S16100E-6TL的Datasheet PDF文件第14页浏览型号IC42S16100E-6TL的Datasheet PDF文件第16页浏览型号IC42S16100E-6TL的Datasheet PDF文件第17页浏览型号IC42S16100E-6TL的Datasheet PDF文件第18页浏览型号IC42S16100E-6TL的Datasheet PDF文件第19页  
IS42S16100E, IC42S16100E  
(1,2)  
OPERATION COMMAND TABLE  
Current State Command  
Operation  
CS RAS CAS WE A11 A10A9-A0  
Idl  
e
DESL  
No Operation or Power-Down(12)  
No Operation or Power-Down(12)  
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
X
H
H
H
H
L
X
H
H
L
X
H
L
X
X
X
V
V
V
V
X
X
X
X
X
NOP  
X
BST  
No Operation or Power-Down  
X
(18)  
READ / READA  
WRIT/WRITA  
ACT  
Illegal  
H
L
V
V
V
V
(18)  
(18)  
Illegal  
L
V
Row Active  
H
H
L
H
L
V
PRE/PALL  
REF/SELF  
MRS  
No Operation  
Auto-Refresh or Self-Refresh(13)  
L
V
X
L
H
L
X
X
Mode Register Set  
L
L
OP CODE  
Row Active  
DESL  
No Operation  
X
H
H
H
H
L
X
H
H
L
X
H
L
X
X
X
V
V
V
V
X
X
X
X
X
X
X
NOP  
No Operation  
BST  
No Operation  
Read Start(17)  
Write Start(17)  
Illegal(10)  
(18)  
READ/READA  
WRIT/WRITA  
ACT  
H
L
V
V
(18)  
(18)  
L
V
V
V
H
H
L
H
L
V
PRE/PALL  
REF/SELF  
MRS  
Precharge(15)  
L
V
X
Illegal  
L
H
L
X
X
Illegal  
L
L
OP CODE  
Read  
DESL  
Burst Read Continues, Row Active When Done  
Burst Read Continues, Row Active When Done  
Burst Interrupted, Row Active After Interrupt  
Burst Interrupted, Read Restart After Interrupt(16)  
Burst Interrupted Write Start After Interrupt(11,16)  
Illegal(10)  
X
H
H
H
H
L
X
H
H
L
X
H
L
X
X
X
V
V
V
V
X
X
X
X
X
X
X
NOP  
BST  
(18)  
READ/READA  
WRIT/WRITA  
ACT  
H
L
V
V
(18)  
(18)  
L
V
V
V
H
H
L
H
L
V
PRE/PALL  
REF/SELF  
MRS  
Burst Read Interrupted, Precharge After Interrupt  
Illegal  
L
V
X
L
H
L
X
X
Illegal  
L
L
OP CODE  
Write  
DESL  
Burst Write Continues, Write Recovery When Done  
Burst Write Continues, Write Recovery When Done  
Burst Write Interrupted, Row Active After Interrupt  
Burst Write Interrupted, Read Start After Interrupt(11,16)  
Burst Write Interrupted, Write Restart After Interrupt(16)  
Illegal(10)  
X
H
H
H
H
L
X
H
H
L
X
H
L
X
X
X
V
V
V
V
X
X
X
X
X
X
X
NOP  
BST  
(18)  
READ/READA  
WRIT/WRITA  
ACT  
H
L
V
V
(18)  
(18)  
L
V
V
V
H
H
L
H
L
V
PRE/PALL  
REF/SELF  
MRS  
Burst Write Interrupted, Precharge After Interrupt  
Illegal  
L
V
X
X
L
H
L
X
Illegal  
L
L
OP CODE  
Read With  
Auto-  
DESL  
NOP  
Burst Read Continues, Precharge When Done  
Burst Read Continues, Precharge When Done  
H
L
X
H
X
H
X
H
X
X
X
X
X
X
Precharge  
BST  
Illegal  
L
L
L
L
L
L
L
H
H
H
L
H
L
L
H
L
X
V
V
V
V
X
X
X
(18)  
READ/READA  
WRIT/WRITA  
ACT  
Illegal  
V
V
(18)  
(18)  
Illegal  
L
V
V
V
Illegal(10)  
Illegal(10)  
Illegal  
H
H
L
H
L
V
PRE/PALL  
REF/SELF  
MRS  
L
V
X
X
L
H
L
X
Illegal  
L
L
OP CODE  
Integrated Silicon Solution, Inc. — www.issi.com  
15  
Rev. C  
01/22/08  
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