IS42S16100E, IC42S16100E
Self-Refresh Command
Power-Down Command
(CS, RAS, CAS, CKE = LOW, WE = HIGH)
(CKE = LOW)
This command executes the self-refresh operation. The
row address to be refreshed, the bank, and the refresh
interval are generated automatically internally during this
operation.Theself-refreshoperationisstartedbydropping
theCKEpinfromHIGHtoLOW.Theself-refreshoperation
continues as long as the CKE pin remains LOW and there
is no need for external control of any other pins. The
self-refresh operation is terminated by raising the CKE
pin from LOW to HIGH. The next command cannot be
executed until the device internal recovery period (tr c )
has elapsed. After the self-refresh, since it is impossible
to determine the address of the last row to be refreshed,
an auto-refresh should immediately be performed for all
addresses (4096 cycles).
When both banks are in the idle (inactive) state, or when
at least one of the banks is not in the idle (inactive) state,
this command can be used to suppress device power
dissipation by reducing device internal operations to
the absolute minimum. Power-down mode is started by
dropping the CKE pin from HIGH to LOW. Power-down
mode continues as long as the CKE pin is held low. All
pins other than the CKE pin are invalid and none of the
other commands can be executed in this mode. The
power-down operation is terminated by raising the CKE
pin from LOW to HIGH. The next command cannot be
executed until the recovery period (tc k a ) has elapsed.
Sincethiscommanddiffersfromtheself-refreshcommand
described above in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (tr e f ). Thus
the maximum time that power-down mode can be held
is just under the refresh cycle time.
Bothbanksmustbeplacedintheidlestatebeforeexecuting
this command.
Burst Stop Command
(CS, WE, = LOW, RAS, CAS = HIGH)
Clock Suspend
(CKE = LOW)
The command forcibly terminates burst read and write
operations. When this command is executed during a
burst read operation, data output stops after the CAS
latency period has elapsed.
Thiscommandcanbeusedtostopthedeviceinternalclock
temporarily during a read or write cycle. Clock suspend
mode is started by dropping the CKE pin from HIGH to
LOW. Clock suspend mode continues as long as the
CKE pin is held LOW. All input pins other than the CKE
pin are invalid and none of the other commands can be
executed in this mode. Also note that the device internal
state is maintained. Clock suspend mode is terminated
by raising the CKE pin from LOW to HIGH, at which point
device operation restarts. The next command cannot be
executed until the recovery period (tc k a ) has elapsed.
No Operation
(CS, = LOW, RAS, CAS, WE = HIGH)
This command has no effect on the device.
Device Deselect Command
(CS = HIGH)
Sincethiscommanddiffersfromtheself-refreshcommand
described above in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (tr e f ). Thus
the maximum time that clock suspend mode can be held
is just under the refresh cycle time.
This command does not select the device for an object of
operation. In other words, it performs no operation with
respect to the device.
Integrated Silicon Solution, Inc. — www.issi.com
13
Rev. C
01/22/08
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
