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IC42S16100E-6TL 参数 Datasheet PDF下载

IC42S16100E-6TL图片预览
型号: IC42S16100E-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-50]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 81 页 / 1082 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S16100E, IC42S16100E  
(1,2)  
TWO BANKS OPERATION COMMAND TRUTH TABLE  
Previous State  
Next State  
Operation  
DESL  
NOP  
CS RAS CAS WE A11 A10A9-A0 BANK 0BANK 1 BANK 0BANK 1  
H
L
L
X
H
H
X
H
H
X
H
L
X
X
X
X
X
X
X
X
X
Any  
Any  
Any  
Any  
Any  
Any  
Any  
Any  
BST  
R/W/A  
I/A  
I/A  
R/W/A  
I
A
I
I/A  
I/A  
I/A  
I/A  
A
I
I/A  
I/A  
I
READ/READA  
L
L
H
H
L
L
H
H
H
H
H
L
L
L
L
H CA(3)  
H CA(3)  
I/A  
R/W  
I/A  
R/W  
R/W/A  
A
R/W/A  
A
R/W/A  
A
I/A  
R/W  
I/A  
I/A  
A
I/A  
A
RP  
RP  
R
RP  
RP  
R
R
I/A  
A
L
L
CA(3)  
CA(3)  
H CA(3)  
H CA(3)  
L
L
CA(3)  
CA(3)  
R/W/A  
A
I/A  
A
R/W  
R
WRIT/WRITA  
L
H
H
H
H
L
L
L
L
H CA(3)  
H CA(3)  
I/A  
R/W  
I/A  
R/W  
R/W/A  
A
R/W/A  
A
R/W/A  
A
I/A  
R/W  
I/A  
I/A  
A
I/A  
A
WP  
WP  
W
WP  
WP  
W
W
I/A  
A
L
L
CA(3)  
CA(3)  
H CA(3)  
H CA(3)  
L
L
CA(3)  
CA(3)  
R/W/A  
A
I/A  
A
R/W  
W
ACT  
L
L
L
L
H
H
H
L
H
L
RA RA  
RA RA  
Any  
I
I
Any  
A
A
Any  
Any  
PRE/PALL  
X
X
H
H
L
H
H
L
L
L
L
X
X
X
X
X
X
R/W/A/I I/A  
I/A R/W/A/I  
I/A R/W/A/I  
R/W/A/I I/A  
R/W/A/I I/A  
I/A R/W/A/I  
I
I
I
I
I
I
I/A  
R/W/A/I  
I
I
I/A  
R/W/A/I  
L
REF  
L
L
L
L
L
L
H
L
X
X
X
I
I
I
I
I
I
I
I
MRS  
OPCODE  
Notes:  
1. H: HIGH level input, L: LOW level input, X: HIGH or LOW level input, RA: Row Address, CA: Column Address  
2. The device state symbols are interpreted as follows:  
I
Idle (inactive state)  
Row Active State  
Read  
A
R
W
Write  
RP Read With Auto-Precharge  
WP Write With Auto-Precharge  
Any Any State  
3. CA: A8,A9 = don’t care.  
Integrated Silicon Solution, Inc. — www.issi.com  
19  
Rev. C  
01/22/08  
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