HA-2420, HA-2425
Electrical Specifications Test Conditions (Unless Otherwise Specified) V
= ±15.0V; C = 1000pF; Digital Input: V = +0.8V
IL
(Sample), V = +2.0V (Hold), Unity Gain Configuration (Output tied to Negative Input) (Continued)
SUPPLY
H
IH
HA-2420-2
HA-2425-5
TEST
CONDITIONS
TEMP.
( C)
o
PARAMETER
Acquisition Time (Note 2)
Hold Step Error
MIN
TYP
3.2
10
860
30
30
5
MAX
MIN
TYP
3.2
10
860
30
30
5
MAX UNITS
To 0.01% 10V Step
25
25
-
-
-
-
-
-
-
-
-
-
6
20
-
-
-
-
-
-
-
-
-
-
-
6
µs
mV
ns
V
= 0V
20
IN
To ±1mV
Hold Mode Settling Time
Aperture Time (Note 3)
Effective Aperture Delay Time
Aperture Uncertainty
Drift Current (Note 2)
HA1-2420
25
-
25
-
-
ns
25
-
-
ns
25
-
-
-
ns
V
= 0V
25
5
-
5
pA
nA
nA
nA
IN
Full
Full
Full
1.8
-
10
-
-
-
HA1-2425
0.1
7.5
1.0
10.0
HA3-2425, HA4P2425, HA9P2425
POWER SUPPLY CHARACTERISTICS
Supply Current (+)
-
-
25
25
-
-
3.5
2.5
90
5.5
3.5
-
-
-
3.5
2.5
90
5.5
3.5
-
mA
mA
dB
Supply Current (-)
Power Supply Rejection
NOTES:
Full
80
74
2. A = ±1, R = 2kΩ, C = 50pF.
V
L
L
3. Derived from computer simulation only; not tested.
Functional Diagram
OFFSET
ADJUST
V+
9
3
4
1
7
-
-INPUT
OUT
-
+
+
2
+INPUT
HA-2420/2425
14
S/H
CONTROL
11
13
GND
5
V-
HOLD
CAPACITOR
Test Circuits and Waveforms
-IN
OUTPUT
HOLD
SAMPLE
INPUT
S/H
CONTROL
S/H
CONTROL
HOLD
CAP
+IN
GND
OUTPUT
C
H
V
STEP
S/H CONTROL
INPUT
NOTE: Set rise/fall times of S/H Control to approximately 20ns.
FIGURE 1. HOLD STEP ERROR AND DRIFT CURRENT
FIGURE 2. HOLD STEP ERROR TEST
5-3
INTERSIL [ Intersil ]
