CA3094, CA3094A, CA3094B
o
Electrical Specifications T = 25 C for Equipment Design. Single Supply V+ = 30V, Dual Supply V
= ±15V, I
= 100µA Unless
A
SUPPLY
ABC
Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT PARAMETERS (Differential Input Voltage = 1V)
Peak Output Voltage With Q “ON”
13
V
+
V+ = 30V, R = 2kΩ to GND
26
27
-
V
V
V
V
V
V
V
V
V
OM
L
(Terminal 6)
With Q “OFF”
13
V
-
-
0.01
0.05
OM
Peak Output Voltage Positive
(Terminal 6)
V
+
V+ = 15V, V- = -15V, R = 2kΩ to -15V
11
12
-
OM
L
Negative
V
-
-
-14.99
29.99
0.040
14.99
-14.96
0.17
-14.95
OM
Peak Output Voltage With Q “OFF”
13
V
+
V+ = 30V, R = 2kΩ to 30V
29.95
-
OM
L
(Terminal 8)
With Q “ON”
13
V
-
-
-
OM
Peak Output Voltage Positive
(Terminal 8)
V
+
V+ = 15V, V- = -15V,
14.95
-
-
OM
R
= 2kΩ to 15V
L
Negative
V
-
-
-
OM
Collector-to-Emitter Saturation Voltage
(Terminal 8)
V
V+ = 30V, I = 50mA, Terminal 6
C
Grounded
0.80
CE(
)
SAT
Output Leakage Current
(Terminal 6 to Terminal 4)
V+ = 30V
-
2
10
-
µA
Composite Small Signal Current Transfer
h
V+ = 30V, V
= 5V, I = 50mA
16,000 100,000
CE
C
FE
Ratio (Beta) (Q and Q
12
)
13
Output Capacitance
Terminal 6
Terminal 8
C
f = 1MHz, All Remaining Terminals Tied
to Terminal 4
-
-
5.5
17
-
-
pF
pF
O
TRANSFER PARAMETERS
Voltage Gain
A
V+ = 30V, I
= 100µA, ∆V
OUT
= 20V,
20,000 100,000
-
-
V/V
dB
ABC
R
= 2kΩ
L
86
100
Forward Transconductance to
Terminal 1
g
1650
2200
2750
µS
M
Slew Rate (Open
Loop)
Positive Slope
Negative Slope
SR
I
I
= 500µA, R = 2kΩ
-
-
-
500
50
-
-
-
V/µs
V/µs
V/µs
ABC
ABC
L
Unity Gain (Non-Inverting Compensated)
= 500µA, R = 2kΩ
0.70
L
Schematic Diagram
EXTERNAL FREQUENCY
COMPENSATION OR INHIBIT INPUT
1
7
V+
INPUTS
NON-
OUTPUT OUTPUT
D
D
3
5
MODE
“Source”
“Sink”
TERM
INV
INV
Q
4
Q
7
R
1
6
8
2
3
Q
6
D
4
2kΩ
D
2
Q
3
2
8
Q
5
Q
9
8
DIFFERENTIAL
VOLTAGE
INPUT
2
Q
Q
2
1
“SINK”
OUTPUT
Q
12
DIFFERENTIAL
VOLTAGE
INPUT
Q
3
Q
13
10
D
R
47kΩ
2
AMPLIFIER
BIAS INPUT
Q
11
5
Q
3
I
ABC
6
6
D
1
“SOURCE”
(DRIVE)
OUTPUT
4
V-
3-14
INTERSIL [ Intersil ]
