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TE28F320 参数 Datasheet PDF下载

TE28F320图片预览
型号: TE28F320
PDF下载: 下载PDF文件 查看货源
内容描述: 3伏高级启动区块快闪记忆体 [3 Volt Advanced Boot Block Flash Memory]
分类和应用:
文件页数/大小: 58 页 / 844 K
品牌: INTEL [ INTEL ]
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3  
1.0  
Introduction  
This datasheet contains the specifications for the 3 Volt Advanced Boot Block flash memory  
family, which is optimized for low power, portable systems. This family of products features  
1.65 V–2.5 V or 2.7 V–3.6 V I/Os and a low VCC/VPP operating range of 2.7 V–3.6 V for read,  
program, and erase operations. In addition this family is capable of fast programming at 12 V.  
Throughout this document, the term “2.7 V” refers to the full voltage range 2.7 V–3.6 V (except  
where noted otherwise) and “VPP = 12 V” refers to 12 V ±5%. Section 1.0 and 2.0 provide an  
overview of the flash memory family including applications, pinouts and pin descriptions. Section  
3.0 describes the memory organization and operation for these products. Sections 4.0 and 5.0  
contain the operating specifications. Finally, Sections 6.0 and 7.0 provide ordering and other  
reference information.  
The 3 Volt Advanced Boot Block flash memory features:  
Enhanced blocking for easy segmentation of code and data or additional design flexibility  
Program Suspend to Read command  
VCCQ input of 1.65 V–2.5 V on all I/Os. See Figures 1 through 4 for pinout diagrams and  
V
CCQ location  
Maximum program and erase time specification for improved data storage.  
Table 1. 3 Volt Advanced Boot Block Feature Summary  
28F400B3(2), 28F800B3,  
28F004B3(2), 28F008B3,  
28F016B3  
Feature  
28F160B3, 28F320B3(3)  
28F640B3  
,
Reference  
Section 4.2,  
Section 4.4  
Section 4.2, 4.4  
Section 4.2, 4.4  
Table 3  
V
Read Voltage  
2.7 V– 3.6 V  
CC  
V
V
I/O Voltage  
1.65 V–2.5 V or 2.7 V– 3.6 V  
2.7 V– 3.6 V or 11.4 V– 12.6 V  
CCQ  
Program/Erase Voltage  
PP  
Bus Width  
Speed  
8 bit  
16 bit  
70 ns, 80 ns, 90 ns, 100 ns, 110 ns  
Section 4.5  
256 Kbit x 16 (4 Mbit),  
512 Kbit x 16 (8 Mbit),  
1024 Kbit x 16 (16 Mbit),  
2048 Kbit x 16 (32 Mbit),  
4096 Kbit x 16 (64 Mbit)  
512 Kbit x 8 (4 Mbit)  
1024 Kbit x 8 (8 Mbit),  
2048 Kbit x 8 (16 Mbit)  
Memory Arrangement  
Section 2.2  
Eight 8-Kbyte parameter blocks and  
Seven 64-Kbyte blocks (4 Mbit) or  
Fifteen 64-Kbyte blocks (8 Mbit) or  
Thirty-one 64-Kbyte main blocks (16 Mbit)  
Sixty-three 64-Kbyte main blocks (32 Mbit)  
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)  
Section 2.2  
Appendix C  
Blocking (top or bottom)  
Locking  
WP# locks/unlocks parameter blocks  
Section 3.3  
Table 8  
All other blocks protected using V  
Extended: –40 °C to +85 °C  
100,000 cycles  
PP  
Operating Temperature  
Program/Erase Cycling  
Section 4.2, 4.4  
Section 4.2, 4.4  
48-Lead TSOP,  
48-Ball µBGA CSP(2)  
48-Ball VF BGA(4)  
40-lead TSOP(1)  
48-Ball µBGA* CSP(2)  
,
Packages  
,
Figure 3, Figure 4  
NOTES:  
1. 32-Mbit and 64-Mbit densities not available in 40-lead TSOP.  
2. 4-Mbit density not available in µBGA* CSP.  
3. V Max is 3.3 V on 0.25µm 32-Mbit devices.  
CC  
4. 4- and 64-Mbit densities not available on 48-Ball VF BGA.  
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