E
BYTE-WIDE SMART 5 FlashFile™ MEMORY FAMILY
Device
Address Selection
Data
Valid
Standby
V
IH
ADDRESSES (A)
Address Stable
VIL
R1
V
IH
CE# (E)
V
IL
R8
R9
R2
R3
V
IH
OE# (G)
VIL
V
IH
WE# (W)
R4
VIL
R5
R10
V
OH
R6
DATA (D/Q)
(DQ0-DQ7)
High Z
High Z
Valid Output
VOL
R7
VCC
V
IH
RP# (P)
VIL
Figure 15. AC Waveform for Read Operations
6.2.5
COMMERCIAL TEMPERATURE RESET OPERATIONS
V
IH
RY/BY# (R)
VIL
P2
VIH
RP# (P)
VIL
P1
Figure 16. AC Waveform for Reset Operation
#
Sym
Parameter
Notes Min
Max Unit
P1 tPLPH RP# Pulse Low Time
100
ns
(If RP# is tied to VCC, this specification is not applicable)
P2 tPLRH RP# Low to Reset during Block Erase, Program, or Lock-Bit
Configuration
2,3
12
µs
NOTES:
1. These specifications are valid for all product versions (packages and speeds).
2. If RP# is asserted when the WSM is not busy (RY/BY# = ‘1’), the reset will complete within 100 ns.
3. A reset time, tPHQV, is required from the latter of RY/BY# or RP# going high until outputs are valid.
31
PRODUCT PREVIEW
INTEL [ INTEL ]
