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SPD6722QCCE 参数 Datasheet PDF下载

SPD6722QCCE图片预览
型号: SPD6722QCCE
PDF下载: 下载PDF文件 查看货源
内容描述: ISA到PC卡( PCMCIA )控制器 [ISA-to-PC-Card (PCMCIA) Controllers]
分类和应用: 总线控制器微控制器和处理器PC
文件页数/大小: 138 页 / 837 K
品牌: INTEL [ INTEL ]
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PD6710/22 ISA-to-PC-Card (PCMCIA) Controllers  
In this mode, Extension Control 2 register bit 3 is set to 1, enabling the respective GPSTB pin to  
function as a read strobe. Reads from the corresponding extended index 0Ah cause GPSTB to go  
active (default active level is low) for the duration of the systems IOR* pulse.  
Note: Data is still written to the shadowed External Data register on writes to Extended Index 0Ah but is  
not visible.  
13.3  
GPSTB in Suspend Mode  
GPSTB read and write strobes operate while the device is in suspend mode, but they are not  
allowed when the device is in hardware-assisted Super-Suspendmode (AEN held high while in  
Suspend mode).  
A clock to the PD6722 is not required for the external signal at GPSTB to occur, but shadowing of  
write values in the internal register at Extended Index 0Ah requires that the PD67XX is not in  
Suspend mode so there is an active internal clock for register writes.  
94  
Datasheet  
 
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