BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
E
Start
Bus
Operation
Command
Comments
Write
Erase Setup
Data = 20H
Addr = Within Block to Be Erased
Write 20H,
Block Address
Write
Erase
Data = D0H
Confirm
Addr = Within Block to Be Erased
Write D0H,
Block Address
Read
Status Register Data
Read Status
Register
Suspend Block
Erase Loop
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
No
0
Suspend
SR.7 =
1
Block Erase
Yes
Repeat for subsequent block erasures.
Full status check can be done after each block erase, or after a
sequence of block erasures.
Write FFH after the last operation to place device in read array mode.
Full Status
Check if Desired
Block Erase
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Read Status Register
Data (See Above)
Command
Comments
Standby
Check SR.3
1 = V Error Detect
PP
1
SR.3 =
0
V
Range Error
PP
Check SR.1
Standby
1 = Device Protect Detect
RP# = VIH , Block Lock-Bit Is Set
Only required for systems
implementing lock-bit configuration
1
1
SR.1 =
0
Device Protect Error
Standby
Standby
Check SR.4,5
Both 1 = Command Sequence Error
Check SR.5
1 = Block Erase Error
Command Sequence
Error
SR.4,5 =
0
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status
Register command in cases where multiple blocks are erased
before full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
1
Block Erase
Error
SR.5 =
0
Block Erase
Successful
Figure 7. Automated Block Erase Flowchart
22
PRELIMINARY
INTEL [ INTEL ]
