Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
5.5.1.2
PCI Clock Timings
PCI Clock Timings
Table 41.
33 MHz
66 MHz
Symbol
Parameter
Units
Notes
Min.
Max.
Min.
Max.
TPERIODPCICLK Clock period for PCI Clock
30
11
11
15
6
ns
ns
ns
TCLKHIGH
TCLKLOW
PCI Clock high time
PCI Clock low time
6
Rise and fall time
requirements for PCI Clock
TRISE/FALL
2
2
ns
5.5.1.3
MII Clock Timings
Table 42.
MII Clock Timings
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Clock period for Tx and Rx Ethernet
clocks
Tperiod100Mbit
Tperiod10Mbit
Tduty
25
25
MHz
Clock period for Tx and Rx Ethernet
clocks
2.5
50
2.5
65
2
MHz
%
Duty cycle for Tx and Rx Ethernet
clocks
35
Rise and fall time requirements for
Tx and Rx Ethernet clocks
Trise/fall
ns
5.5.1.4
UTOPIA-2 Clock Timings
UTOPIA-2 Clock Timings
Table 43.
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Clock period for Tx and Rx UTOPIA-2
clocks
Tperiod
Tduty
33
60
2
MHz
%
1
1
1
Duty cycle for Tx and Rx UTOPIA-2 clocks
40
50
Rise and fall time requirements for Tx and
Rx UTOPIA-2 clocks
Trise/fall
ns
Note:
1.
The UTOPIA interface can operate at a minimum frequency greater than 0 Hz.
5.5.1.5
Expansion Bus Clock Timings
Expansion Bus Clock Timings
Table 44.
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Tperiod
Tduty
Clock period for expansion-bus clock
Duty cycle for expansion-bus clock
66
60
MHz
%
40
50
Rise and fall time requirements for
expansion-bus clock
Trise/fall
2
ns
March 2005
94
Datasheet
Document Number: 252479, Revision: 005
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