MAX 3000A Programmable Logic Device Family Data Sheet
By combining the pulse and shift times for each of the programming
stages, the program or verify time can be derived as a function of the TCK
frequency, the number of devices, and specific target device(s). Because
different ISP-capable devices have a different number of EEPROM cells,
both the total fixed and total variable times are unique for a single device.
Programming a Single MAX 3000A Device
The time required to program a single MAX 3000A device in-system can
be calculated from the following formula:
Cycle
PTCK
t
= t
+ -------------------------------
PROG
PPULSE
f
TCK
where: tPROG
= Programming time
= Sum of the fixed times to erase, program, and
verify the EEPROM cells
tPPULSE
CyclePTCK = Number of TCKcycles to program a device
fTCK = TCKfrequency
The ISP times for a stand-alone verification of a single MAX 3000A device
can be calculated from the following formula:
Cycle
VTCK
t
= t
+ --------------------------------
VER
VPULSE
f
TCK
where: tVER
tVPULSE
CycleVTCK = Number of TCKcycles to verify a device
= Verify time
= Sum of the fixed times to verify the EEPROM cells
Altera Corporation
15
INTEL [ INTEL ]
