SMART 5 BOOT BLOCK MEMORY FAMILY
E
A
B
C
A
D
E
F
V
IH
ADDRESSES [A]
CE#(WE#) [E(W)]
AIN
IN
VIL
W8
V
W5
IH
VIL
W6
W2
V
IH
OE# [G]
VIL
W9
V
IH
WE#(CE#) [W(E)]
VIL
W3
W4
W7
V
IH
High Z
W1
Valid
SRD
DATA [D/Q]
D
D
IN
D
IN
IN
VIL
W10
W12
VHH
6.5V
V
IH
RP# [P]
VIL
V
IH
WP#
VIL
W11
W13
VPPH
2
VPPH
VPPLK
VIL
1
VPP[V]
0599-15
NOTE:
A.
B. Write Program Set-Up or Erase Set-Up Command.
V
power-up and standby.
CC
C. Write valid address & data (if program operation) or Erase Confirm (if erase operation) command.
D. Automated program or erase delay.
E. Read status register data.
F. Write Read Array command if write operations are completed.
Figure 16. AC Waveforms for Write Operations
34
ADVANCE INFORMATION
INTEL [ INTEL ]
