28F320J5 and 28F640J5
Figure 6. Write to Buffer Flowchart
Bus
Operation
Start
Command
Comments
Data = E8H
Set Time-Out
Write
Read
Write to Buffer
Block Address
Issue Write to Buffer
Command E8H, Block
Address
No
XSR. 7 = Valid
Addr = Block Address
Check XSR. 7
1 = Write Buffer Available
0 = Write Buffer Not Available
Read Extended
Status Register
Standby
Data = N = Word/Byte Count
N = 0 Corresponds to Count = 1
Addr = Block Address
Write
(Note 1, 2)
0
Write to
Buffer Time-Out?
XSR.7 =
1
Write
(Note 3, 4)
Data = Write Buffer Data
Addr = Device Start Address
Write Word or Byte
Count, Block Address
Write
(Note 5, 6)
Data = Write Buffer Data
Addr = Device Address
Program Buffer
to Flash
Confirm
Data = D0H
Addr = Block Address
Write Buffer Data,
Start Address
Write
Status Register Data with the
Device Enabled, OE# Low
Updates SR
Read
(Note 7)
X = 0
Yes
Addr = Block Address
Check SR.7
1 = WSM Ready
0 = WSM Busy
Check
X = N?
Standby
No
1. Byte or word count values on DQ 0 - DQ7 are loaded into the
Yes
count register. Count ranges on this device for byte mode are
= 00H to 1FH and for word mode are N = 0000H to 000FH.
2. The device now outputs the status register when read (XSR is
no longer available).
N
Abort Write to
Buffer Command?
Yes
Write to Another
Block Address
3. Write Buffer contents will be programmed at the device start
address or destination flash address.
4. Align the start address on a Write Buffer boundary for
maximum programming performance (i.e., A 4 - A0 of the start
address = 0).
Yes
No
Write to Buffer
Aborted
Write Next Buffer Data,
Device Address
5. The device aborts the Write to Buffer command if the current
address is outside of the original block address.
6. The status register indicates an "improper command
sequence" if the Write to Buffer command is aborted. Follow this
with a Clear Status Register command.
X = X + 1
Program Buffer to Flash
Confirm D0H
7. Toggling OE# (low to high to low) updates the status register.
This can be done in place of issuingthe Read Status Register
command.
Another Write to
Buffer?
Full status check can be done after all erase and write sequences
complete. Write FFH after the last operation to reset the device to
read array mode.
Issue Read
Status Command
No
Read Status Register
1
0
SR.7 =
1
Full Status
Check if Desired
Programming
Complete
0606_07
32
Datasheet
INTEL [ INTEL ]
