Networking Silicon — 82551IT
9.3
MDI Register 16:31
9.3.1
Register 16: PHY Unit Status and Control Register
Table 31. PHY Unit Status and Control
Bit(s)
15:14
Name
Reserved
Description
Default
R/W
RW
These bits are reserved and should be set to 0b
00
0
13
Carrier Sense
Disconnect
Control
This bit enables the disconnect function.
1 = Disconnect function enabled
0 = Disconnect function disabled
RW
12
Transmit Flow
Control Disable
This bit enables Transmit Flow Control
1 = Transmit Flow Control enabled
0 = Transmit Flow Control disabled
0
RW
11
10
Receive De-
Serializer In-Sync receive de-serializer in-sync.
Indication
This bit indicates receipt status of the 100BASE-TX
--
1
RO
RO
100BASE-TX
Power-Down
This bit indicates the power state of 100BASE-TX
PHY unit.
1 = Power-Down
0 = Normal operation
9
8
10BASE-T
Power-Down
This bit indicates the power state of 100BASE-TX
PHY unit.
1
RO
RO
1 = Power-Down
0 = Normal operation
Polarity
This bit indicates 10BASE-T polarity.
1 = Reverse polarity
--
0 = Normal polarity
7:2
1
Reserved
Speed
These bits are reserved and should be set to 0b.
000000
--
RO
RO
This bit indicates the Auto-Negotiation result.
1 = 100 Mbps
0 = 10 Mbps
0
Duplex Mode
This bit indicates the Auto-Negotiation result.
1 = Full Duplex
--
RO
0 = Half Duplex
9.3.2
Register 17: PHY Unit Special Control Register
Table 32. Register 17: PHY Unit Special Control
Bit(s)
15
Name
Description
Default
R/W
Scrambler By-
pass
1 = By-pass Scrambler
0
RW
RW
RW
0 = Normal operations
14
13
By-pass 4B/5B
1 = 4 bit to 5 bit by-pass
0 = Normal operation
0
0
Force Transmit H- 1 = Force transmit H-pattern
Pattern
0 = Normal operation
Datasheet
65
INTEL [ INTEL ]
