Electrical Specifications
Figure 2-5. V and V
Overshoot Example Waveform
CC
CACHE
VOS: Peak maximum
overshoot identified
during validation
TOS(OS time above
VID or CVID): Time
from initial VID or
CVID crossing to final
crossing of VID or
CVID
Time
Overshoot Waveform
VID/CVID Reference
2.10.3
Die Voltage Validation
Overshoot events from application testing on the processor must meet the specifications in
Table 2-11 when measured across the V and V pins. Overshoot events that are
CCSENSE
SSSENSE
< 10 ns in duration may be ignored. These measurements of processor die level overshoot should
be taken with a 100 MHz bandwidth limited oscilloscope.
Table 2-12. Front Side Bus Differential BCLK Specifications
Symbol
VL
Parameter
Min
Typ
Max
Unit Figure Notes
Input Low Voltage
Input High Voltage
-0.150
0.660
0.000
0.700
N/A
V
V
2-8
2-8
VH
0.850
Absolute Crossing
Point
2-8,
2-9
VCROSS(abs)
0.250
N/A
N/A
N/A
0.550
V
V
V
1,7
Relative Crossing
Point
2-8,
2-9
0.250 + 0.5*
0.550 + 0.5*
VCROSS(rel)
2,7,8
(V
- 0.700)
(V
- 0.700)
Havg
Havg
Range of Crossing
Point
2-8,
2-9
∆ VCROSS
N/A
0.140
VOV
VUS
Overshoot
Undershoot
N/A
- 0.300
N/A
N/A
N/A
+ 0.300
N/A
V
V
V
V
2-8
2-8
2-8
2-8
3
4
5
6
VRBM
VTM
Ringback Margin
Threshold Margin
0.200
N/A
VCROSS-0.100
VCROSS+0.100
NOTES:
1. Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0 is equal to the
falling edge of BCLK1.
2. VHavg is the statistical average of the VH measured by the oscilloscope.
3. Overshoot is defined as the absolute value of the maximum voltage.
64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
33
INTEL [ INTEL ]
