Signal Description
Figure 2-9. Word Configuration Write Protocol (SMBus Byte Write, PEC Enabled)
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 10011000
Cmd = 00011000
A
Bus Number
A
A
PEC
PEC
A
A
P
P
Device/Function
A
A
P
P
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 00011000
Cmd = 00011000
A
A
A
A
PEC
PEC
Register Num[15:8]
Register Num[7:0]
A
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 00011000
Cmd = 01011000
A
A
A
A
A
P
Data[W:X]
Data[Y:Z]
PEC
PEC
CLOCK STRETCH
A
P
Figure 2-10. DWord Memory Read Protocol (SMBus Word Write/(Word, Byte) Read, PEC
Enabled)
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 10110001
Cmd = 01110001
A
A
Dest Mem
A
A
Add Offset[23:16]
Add Offset[7:0]
A
A
PEC
PEC
A P
CLOCK STRETCH
A
P
Add Offset[15:8]
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 10110001
Status
A
A
Sr
Data[31:24]
Data[15:8]
A
A
PEC
PEC
N
N
P
P
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 00110001
Data[23:16]
A
A
Sr
S
11X0_XXX
11X0_XXX
W
A
Cmd = 01110000
Data[7:0]
A
Sr
R
A
A
PEC
N P
Figure 2-11. DWord Memory Read Protocol (SMBus Word Write/Byte Read, PEC
Enabled)
S
S
11X0_XXX
11X0_XXX
W
W
A
A
Cmd = 10110001
Cmd = 01110001
A
A
Dest Mem
A
A
Add Offset[23:16]
Add Offset[7:0]
A
A
PEC
PEC
A
P
CLOCK STRETCH
A
P
Add Offset[15:8]
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 10110000
Status
A
A
Sr
PEC
PEC
N
N
P
P
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 00110000
Data[31:24]
A
A
Sr
S
11X0_XXX
11X0_XXX
W
A
Cmd = 00110000
Data23:16]
A
Sr
R
A
A
PEC
N P
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 00110000
Data15:8]
A
A
Sr
PEC
PEC
N
N
P
P
S
11X0_XXX
11X0_XXX
W
R
A
A
Cmd = 01110000
Data[7:0]
A
A
Sr
66
Intel® 6702PXH 64-bit PCI Hub Datasheet
INTEL [ INTEL ]
