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6702PXH 参数 Datasheet PDF下载

6702PXH图片预览
型号: 6702PXH
PDF下载: 下载PDF文件 查看货源
内容描述: 64位PCI中枢 [64-bit PCI Hub]
分类和应用: PC
文件页数/大小: 214 页 / 2554 K
品牌: INTEL [ INTEL ]
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Electrical Characteristics  
4.3  
Timing Specifications  
4.3.1  
PCI Express Interface Timing  
4.3.1.1  
Differential Transmitter (TX) Output Specifications  
Table 4-16 defines the specifications of parameters for the differential output at all transmitters  
(TXs). The parameters are specified at the component pins.  
Table 4-16. Differential Transmitter (TX) Output Specifications  
Symbol  
Parameter  
Min  
Nom  
Max  
Units Comments  
UI  
Unit Interval  
399.88 400 400.12  
ps  
UI  
UI  
Each UI is 400 ps +/-300 ppm.  
UI does not account for SSC  
dictated variations.  
See Note 1.  
TTX-EYE  
Minimum TX Eye Width  
0.70  
The maximum transmitter jitter  
can be derived as TTX-MAX-  
JITTER = 1 - TTX-EYE = .3 UI  
See Notes 2 and 3.  
TTX-EYE-  
Maximum time between  
the jitter median and  
maximum deviation for  
the median  
0.15  
Jitter is defined as the  
measurement variation of the  
MEDIAN-to-MAX-  
JITTER  
crossing points (VTX-DIFFp-p  
=
0V) in relation to an appropriate  
average TX UI.  
See Notes 2 and 3.  
TTX-RISE, TTX- D+/D- TX Output Rise/  
0.125  
50  
UI  
UI  
UI  
See Notes 2 and 4.  
Fall Time  
FALL  
TTX-IDLE-MIN  
Minimum time spent in  
Electrical Idle  
Minimum time a transmitter  
must be in Electrical Idle.  
TTX-IDLE-SET- Maximum time to  
20  
After sending an Electrical Idle  
ordered-set, the transmitter  
must meet all Electrical Idle  
specifications within this time.  
transition to a valid  
Electrical Idle after  
sending an Electrical  
Idle ordered-set  
TO-IDLE  
TTX-IDLE-RCV- Maximum time spent in  
100  
ms  
ps  
Maximum time spent in  
Electrical Idle before initiating a  
receiver detect sequence.  
Electrical Idle before  
DETECT-  
initiating a receiver  
MAX  
detect sequence.  
LTX-SKEW  
Lane-to-Lane Output  
Skew  
500 +  
2UI  
Static skew between any two  
Transmitter Lanes within a  
single Link.  
NOTES:  
1. No test load is necessarily associated with this value.  
2. Specified at the measurement point into a timing and voltage compliance test load as shown in Figure 4-2  
and measured over any 250 consecutive TX UIs. (Also refer to the Transmitter Compliance Eye Diagram as  
shown in Figure 4-1.)  
3. A TTX-EYE = 0.70 UI provides for a total sum of deterministic and random jitter budget of TTX-JITTER-MAX  
=
0.30 UI for the transmitter collected over any 250 consecutive TX UIs. The TTX-EYE-MEDIAN-to-MAX-JITTER  
specification ensures a jitter distribution in which the median and the maximum deviation from the median is  
less than half of the total TX jitter budget collected over any 250 consecutive TX UIs. It should be noted that  
the median is not the same as the mean. The jitter median describes the point in time where the number of  
jitter points on either side is approximately equal as opposed to the averaged time value.  
4. Measured between 20-80% at Transmitter package pins into a test load as shown in Figure 4-2 for both  
V
TX-D+ and VTX-D-.  
168  
Intel® 6702PXH 64-bit PCI Hub Datasheet  
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