Electrical Characteristics
The eye diagram must be valid for any 250 consecutive UIs. An appropriate average TX UI must
be used as the interval for measuring the eye diagram.
4.1.7.2
PCI and PCI-X Interface DC Specifications (3.3V Signaling
Environment)
Table 4-10 summarizes the DC specifications for 3.3V signaling.
Table 4-10. DC Specifications for PCI and Mode 1 PCI-X 3.3V Signaling
PCI
PCI-X
Symbol
Parameter
Units Condition Notes
Min
Max
Min
Max
VCC33
Vih
Supply
Voltage
3.0
3.6
3.0
3.6
V
V
V
Input High
Voltage
0.5VCC33
-0.5
VCC33
+0.5
0.5VCC33
-0.5
VCC33
+0.5
Vil
Input Low
Voltage
0.3VCC33
0.35VCC33
Vipu
Iil
Input Pull-up 0.7VCC33
Voltage
0.7VCC33
V
1
2
Input
Leakage
Current
10
10
µA
0 < Vin <
VCC33
Voh
Vol
Output High 0.9VCC33
Voltage
0.9VCC33
V
V
Iout = -500
µA
Output Low
Voltage
0.1VCC33
0.1VCC33
Iout = 1500
µA
Cin
Input Pin
Capacitance
10
8
10
8
pF
pF
3
Cclk
PAPCLKI
Pin
5
5
Capacitance
CIDSEL
Lpin
IDSEL Pin
Capacitance
8
20
1
8
20
1
pF
nH
µA
4
5
6
Pin
Inductance
IOff
PAPME#
input
leakage
-
-
Vo ≤ 3.6 V
VCC33 off
or floating
NOTES:
1. This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are
calculated to pull a floated network. Applications sensitive to static power utilization must assure that the
input buffer is conducting minimum current at this input voltage.
2. Input leakage currents include hi-Z output leakage for all bi-directional buffers with tri-state outputs.
3. Absolute maximum pin capacitance for a PCI/PCI-X input except PAPCLKI and IDSEL.
4. For conventional PCI only, lower capacitance on this input-only pin allows for non-resistive coupling to
PAAD[xx]. PCI-X configuration transactions drive the AD bus four clocks before PAFRAME# asserts (see
Section 2.7.2.1 of the PCI-X Protocol Addendum to the PCI Local Bus Specification, Revision 2.0a).
5. For conventional PCI, this is a recommendation, not an absolute requirement. For PCI-X, this is a
requirement.
6. This input leakage is the maximum allowable leakage into the PAPME# open drain driver when power is
removed from VCC33 of the component. This assumes that no event has occurred to cause the device to
attempt to assert PAPME#.
164
Intel® 6702PXH 64-bit PCI Hub Datasheet
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