Signal Description
• PxGNT_[2:0]#
• PxREQ_[2:0]#
• PxPERR#, PxSERR#
• PxPCLKO[5:0] (Only driven to ground if enabled through the bridge – otherwise these outputs
remain high. PxPCLKO[6] is not driven to ground because it is connected back to PxPCLKIN)
• PxIRQ_[7:0]#
• PxPME#
These signals will be driven back to their normal PCI levels at various times in the clock
connection process. When a card is reconnected to the bus, it follows the following algorithm:
• Power is applied to the card. This does not affect any of the PCI signals that are now being
driven to ground.
• After a fixed (refer to Standard Hot-Plug Controller and Subsystem Specification Revision
1.0) period of time, the clock is connected to the card. When this occurs, PxPCLKO[5:0] will
no longer be driven to ground, but will toggle normally (assuming that software has not
disabled that particular PxPCLKO pin). In hot plug terms, this is the equivalent of the
“CLKEN#” signal.
• After another fixed (refer to Standard Hot-Plug Controller and Subsystem Specification
Revision 1.0) period of time, the bus is connected to the card. When this occurs, The remaining
signals listed above which were driven to ground will be driven to their default values, except
for PxPCIRST#, which will continue to be driven to ground. The new signal values are listed
below:
— PxAD[63:0], PxCBE_[7:0]#, PxPAR, PxPAR64, PxREQ64#, PxACK64# - driven
— PxFRAME#, PxIRDY#, PxTRDY#, PxSTOP#, PxDEVSEL#, PxLOCK# - driven to
VCC33 for one clock, then tri-stated
— PxGNT_[5:0]# - driven to VCC33 for one clock, then tri-stated
— PxPERR#, PxSERR# - driven to VCC33 for one clock, then tri-stated
— PxPME# - tri-stated
— PxIRQ_[7:0]# - tri-stated
In hot plug terms, this is the equivalent of the “BUSEN#” signal.
• After a final fixed period of time, the card is taken out of reset. When this occurs, the
PxPCIRST# pin will be continuously driven to VCC33. This algorithm could be altered (for
example, the bus could be enabled before the clock). The implication, however, is that there
are three communication signals from the hot plug logic (BUSEN#, CLKEN#, and PCIRST#)
to I/O buffer logic to control the state of their corresponding pins.
2.12.6.2
Aborting Outbound PCI Cycles When Card is Disconnected
When a PCI card is not present in a multi-slot system, it has been isolated. This means that all
cycles destined for that particular card (peer traffic or other CPU based traffic) will master abort on
the PCI bus because no PxDEVSEL# will be driven. To be consistent in a single-slot system, the
Intel® 6700PXH 64-bit PCI Hub must master abort cycles that are destined for that PCI bus when
the card is disconnected. Therefore, the buffer interface will have to internally master abort all
outbound transactions destined for that PCI bus until card is connected again.
Intel® 6700PXH 64-bit PCI Hub Datasheet
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INTEL [ INTEL ]
