Signal Description
Every round of polling by the Intel® 6700PXH 64-bit PCI Hub involves shifting all 36 bits,
regardless of the number of slots implemented. Bit 1 in Table 2-25 represents the first bit that
shifted into the Intel® 6700PXH 64-bit PCI Hub in the sequence of 36 bits.
Table 2-25. Serial Output Stream
Bit#
Value
Slot6_PWREN
Bit#
Value
1
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Slot3_PWREN
Slot3_CLKEN
Slot3_BUSEN
Slot3_RST
2
3
Slot6_CLKEN
Slot6_BUSEN
Slot6_RST
4
5
Slot61_PLED
Slot61_ALED
Slot5_PWREN
Slot5_CLKEN
Slot5_BUSEN
Slot5_RST
Slot3_PLED
Slot3_ALED
Slot2_PWREN
Slot2CLKEN
Slot2_BUSEN
Slot2_RST
6
7
8
9
10
11
12
13
14
15
16
17
18
Slot5_PLED
Slot5_ALED
Slot4_PWREN
Slot4_CLKEN
Slot4_BUSEN
Slot4_RST
Slot2_PLED
Slot2_ALED
Slot1_PWREN
Slot1_CLKEN
Slot1_BUSEN
Slot1_RST
Slot4_PLED
Slot4_ALED
Slot1_PLED
Slot1_ALED
2.12.5
Parallel Mode Operation
In parallel mode, the Intel® 6700PXH 64-bit PCI Hub provides 6 slot control outputs and 8 slot
control inputs for each of the two slots it can control. The Intel® 6700PXH 64-bit PCI Hub
operates in this mode if the number of hot plug slots implemented is either 1 or 2, as programmed
into the slot configuration register.
If the number of slots is set to 1, then the Intel® 6700PXH 64-bit PCI Hub ignores the second port.
Platforms must tie this port to its benign value. Refer to Table 2-26 for how the parallel hot plug
mode pins are reused (muxed) with other Intel® 6700PXH 64-bit PCI Hub pins:
Table 2-26. Muxed Hot Plug Mode Signals Parallel Mode (Sheet 1 of 2)
Multiplexed With
Signal
Type
Bus A
Bus B
HxATNLED_1#
HxATNLED_2#
HxBUSEN_1#
HxBUSEN_2#
O
O
O
O
HAATNLED_1#
HPA_SOLR
HBATNLED_1#
HPB_SOLR
PAGNT_[5]#
PAGNT_[4]#
PBGNT_[5]#
PBGNT_[4]#
Intel® 6700PXH 64-bit PCI Hub Datasheet
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INTEL [ INTEL ]
