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6700PXH 参数 Datasheet PDF下载

6700PXH图片预览
型号: 6700PXH
PDF下载: 下载PDF文件 查看货源
内容描述: 64位PCI中枢 [64-bit PCI Hub]
分类和应用: PC
文件页数/大小: 194 页 / 2283 K
品牌: INTEL [ INTEL ]
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Signal Description  
2.3  
PCI Bus Interface 64-bit Extension  
There are two sets of PCI Bus extension signals; one for PCI Bus A and one for PCI Bus B.  
Table 2-3. PCI Bus Interface 64-bit Extension Interface A and B Signals  
Signal  
Type Description  
PAACK64#  
PBACK64#  
I/O  
I/O  
PCI Interface Acknowledge 64-bit Transfer: This signal is asserted by the  
target only when PxREQ64# is asserted by the initiator. It indicates the target’s  
ability to transfer data using 64 bits. It has the same timing as PxDEVSEL#.  
PAAD[63:32]  
PBAD[63:32]  
PCI Address/Data: These signals are a multiplexed address and data bus. This  
bus provides an additional 32 bits to the PCI bus. During the data phases of a  
transaction, the initiator drives the upper 32 bits of 64-bit write data, or the target  
drives the upper 32 bits of 64-bit read data, when PxREQ64# and PxACK64# are  
both asserted.  
PACBE_[7:4]#  
PBCBE_[7:4]#  
I/O  
Bus Command and Byte Enables (Upper 4 bits): These signals are a  
multiplexed command field and byte enable field. For both read and write  
transactions, the initiator will drive byte enables for the PxAD[63:32] data bits on  
PxCBE_[7:4]# during the data phases when PxREQ64# and PxACK64# are both  
asserted.  
PAPAR64  
PBPAR64  
I/O  
I/O  
PCI Interface Upper 32-bits Parity: This signal carries the even parity of the 36  
bits of PxAD[63:32] and PxCBE_[7:4]# for both address and data phases.  
PAREQ64#  
PBREQ64#  
PCI interface Request 64-bit Transfer: This signal is asserted by the initiator to  
indicate that the initiator is requesting a 64-bit data transfer. It has the same timing  
as PxFRAME#. When the Intel® 6700PXH 64-bit PCI Hub is the initiator, this  
signal is an output. When the Intel® 6700PXH 64-bit PCI Hub is the target, this  
signal is an input.  
2.4  
Interrupt Interface  
This section lists the interrupt interface signals. There are two sets of IRQ interrupt signals;  
PAIRQ_[15:0]# for PCI Bus A and PBIRQ_[15:0]# for PCI Bus B.  
Table 2-4. Interrupt Interface A and B Signals  
Signal  
Type Description  
PAIRQ_[15:0]#  
PBIRQ_[15:0]#  
I
Interrupt Request Bus: The PxIRQ# lines from PCI interrupts PIRQ[A:D] can be  
routed to these interrupt lines. PBIRQ_[15:0]# are connected to a second internal  
I/OxAPIC that resides on the PCI Express* interface.  
22  
Intel® 6700PXH 64-bit PCI Hub Datasheet  
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