2 Signal Description
The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs when
the signal is at a low voltage level. When “#” is not present after the signal name the signal is
asserted when at the high voltage level.
Note: Some interfaces are divided into Interface A and Interface B. In these cases the signal names use
the letter “A” or “B” to signify the interface (interface A or interface B) when distinguishing the
PCI bus segment of the Intel® 6700PXH 64-bit PCI Hub. For example, in the PCI Bus interface,
PAAD[31:0] refer to the AD bus signals on PCI Bus A and PBAD[31:0] refer to the AD bus signals
on PCI Bus B. When a description applies to both interface A and interface B, a lower case “x”
may be used in the signal name (e.g., PxAD[31:0]).
The following notations are used to describe the signal type:
P
Power pin
I
Input pin
O
I/O
Output pin
Bi-directional Input/Output pin
2.1 PCI Express* Interface
Table 2-1. PCI Express* Interface Signals
Signal
Type
Description
EXP_CLK
I
PCI Express* Reference Clocks: 100 MHz differential clock pair. Connect to
an external 100 MHz differential clock.
EXP_CLK#
EXP_COMP[1:0]
I
I
PCI Express* Compensation Inputs: Analog signals.
EXP_RXP[7:0]
EXP_RXN[7:0]
PCI Express* Serial Data Inputs: PCI Express* differential data receive
signals.
For 4X mode, only signals EXP_RXP[3:0] and EXP_RXN[3:0] are used.
For 8X mode, all of these signals, EXP_RXP[7:0] and EXP_RXN[7:0], are
used.
These signals are the PExRp[7:0] and PExRn[7:0] signals per the PCI SIG
convention.
EXP_TXP[7:0]
EXP_TXN[7:0]
O
PCI Express* Serial Data Outputs: PCI Express* differential data transmit
signals.
For 4X mode, only signals EXP_TXP[3:0] and EXP_TXN[3:0] are used.
For 8X mode, all of these signals, EXP_TXP[7:0] and EXP_TXN[7:0], are used.
These signals are the PExTp[7:0] and PExTn[7:0] signals per the PCI SIG
convention.
Intel® 6700PXH 64-bit PCI Hub Datasheet
19
INTEL [ INTEL ]
