Introduction
1.2.6
JTAG
The Intel® 6700PXH 64-bit PCI Hub has a JTAG (TAP) port compliant with the IEEE Standard
Test Access Port and Boundary Scan Architecture 1149.1 Specifications. The TAP controller is
accessed serially through five dedicated pins. This can be used for test and debug purposes. System
board interconnects can be DC tested using the boundary scan logic in pads.
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Intel® 6700PXH 64-bit PCI Hub Datasheet
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