Chapter 3: DC and Switching Characteristics for MAX V Devices
3–25
Timing Model and Specifications
Table 3–35. External Timing Output Delay and tOD Adders for Slow Slew Rate for MAX V Devices
5M40Z/ 5M80Z/ 5M160Z/
5M1270Z/ 5M2210Z
5M240Z/ 5M570Z
C5, I5
Max
I/O Standard
Unit
C4
C4
C5, I5
Max
Min
—
—
—
—
—
—
—
—
—
—
—
—
Max
5,913
6,488
5,913
6,488
9,088
9,808
21,758
23,028
39,068
40,578
69,332
6,488
Min
—
—
—
—
—
—
—
—
—
—
—
—
Min
—
—
—
—
—
—
—
—
—
—
—
—
Max
6,612
7,313
6,612
7,313
10,021
10,881
21,134
22,399
34,499
36,281
55,796
339
Min
—
—
—
—
—
—
—
—
—
—
—
—
16 mA
8 mA
8 mA
4 mA
14 mA
7 mA
6 mA
3 mA
4 mA
2 mA
3 mA
20 mA
6,043
6,645
6,043
6,645
9,222
9,962
21,782
23,032
39,032
40,542
70,257
6,645
6,293
6,994
6,293
6,994
9,702
10,562
20,815
22,080
34,180
35,962
55,477
418
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
3.3-V LVTTL
3.3-V LVCMOS
2.5-V LVTTL / LVCMOS
1.8-V LVTTL / LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
3.3-V PCI
Table 3–36. IOE Programmable Delays for MAX V Devices
5M40Z/ 5M80Z/ 5M160Z/
5M1270Z/ 5M2210Z
C4 C5, I5
5M240Z/ 5M570Z
C5, I5
Max
Parameter
Unit
C4
Min
Max
Min
Min
Max
Min
Max
Input Delay from Pin to Internal
Cells = 1
—
1,858
—
2,214
616
—
1,592
—
1,960
ps
ps
Input Delay from Pin to Internal
Cells = 0
—
569
—
—
115
—
142
May 2011 Altera Corporation
MAX V Device Handbook
INTEL [ INTEL ]
