Switching Characteristics
Page 19
Table 20. Transceiver Specifications for Arria V GX and SX Devices (Part 4 of 4)
Transceiver Speed Grade 4 Transceiver Speed Grade 6
Symbol/
Description
Conditions
Unit
Min
Typ
Max
Min
Typ
Max
Interface speed (double-
width mode)
—
25
—
163.84
25
—
163.84
MHz
Notes to Table 20:
(1) The transmitter REFCLKphase jitter is 30 ps p-p at bit error rate (BER) 10-12
.
(2) Differential LVPECL signal levels must comply to the minimum and maximum peak-to-peak differential input voltage specified in this table.
(3) The maximum peak-to peak differential input voltage of 300 mV is allowed for DC coupled link.
(4) For data rate <=3.2 Gbps, connect VCCR_GXBL/R to either 1.1-V or 1.15-V power supply. For data rate >3.2 Gbps, connect VCCR_GXBL/R to a 1.15-V
power supply. For details, refer to the Arria V GT, GX, ST, and SX Device Family Pin Connection Guidelines.
(5) The device cannot tolerate prolonged operation at this absolute maximum.
(6) The differential eye opening specification at the receiver input pins assumes that you have disabled the Receiver Equalization feature. If you
enable the Receiver Equalization feature, the receiver circuitry can tolerate a lower minimum eye opening, depending on the equalization level.
(7) The AC coupled VICM is 650 mV for PCIe mode only.
(8) For standard protocol compliance, use AC coupling.
(9) tLTR is the time required for the receive CDR to lock to the input reference clock frequency after coming out of reset.
(10) tLTD is time required for the receiver CDR to start recovering valid data after the rx_is_lockedtodatasignal goes high.
(11) tLTD_manual is the time required for the receiver CDR to start recovering valid data after the rx_is_lockedtodatasignal goes high when the
CDR is functioning in the manual mode.
(12) tLTR_LTD_manual is the time the receiver CDR must be kept in lock to reference (LTR) mode after the rx_is_lockedtorefsignal goes high when
the CDR is functioning in the manual mode.
(13) The rate match FIFO supports only up to 300 parts per million (ppm).
(14) To support data rates lower than the minimum specification through oversampling, use the CDR in LTR mode only.
(15) This specification is only applicable to channels on one side of the device across two transceiver banks.
(16) The Quartus II software allows AC gain setting = 3 for design with data rate between 611 Mbps and 1.25 Gbps only.
December 2013 Altera Corporation
Arria V GX, GT, SX, and ST Device Datasheet