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Switching Characteristics
Switching Characteristics
This section provides performance characteristics of Arria V core and periphery
blocks for commercial grade devices.
Transceiver Performance Specifications
This section describes transceiver performance specifications.
Table 20 and Table 21 list the Arria V transceiver specifications.
Table 20. Transceiver Specifications for Arria V GX and SX Devices (Part 1 of 4)
Transceiver Speed Grade 4 Transceiver Speed Grade 6
Min Typ Max Min Typ Max
Symbol/
Description
Conditions
Unit
Reference Clock
1.2 V PCML, 1.4 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL (2), HCSL, and
Supported I/O Standards
LVDS
Input frequency from REFCLK
input pins
—
27
—
—
—
710
400
27
—
—
—
710
400
MHz
ps
20% to 80% of
rising clock edge
Rise time
80% to 20% of
falling clock edge
Fall time
—
45
—
—
—
400
55
—
45
—
—
—
400
55
ps
%
Duty cycle
—
Peak-to-peak differential
input voltage
300/
300/
—
200
200
mV
2000 (3)
2000 (3)
Spread-spectrummodulating
clock frequency
PCI Express®
(PCIe®)
30
—
—
33
—
30
—
—
33
—
kHz
—
0 to
–0.5%
100
0 to
–0.5%
100
Spread-spectrum
downspread
PCIe
On-chip termination resistors
—
—
—
—
—
—
—
—
—
—
Ω
1.1/1.15
1.1/1.15
VICM (AC coupled)
V
(4)
(4)
HCSL I/O standard
for the PCIe
VICM (DC coupled)
250
—
550
250
—
550
mV
reference clock
10 Hz
100 Hz
1 KHz
—
—
—
—
—
—
—
—
—
—
—
—
-50
-80
—
—
—
—
—
—
—
—
—
—
—
—
-50
-80
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Transmitter REFCLK Phase
Noise (1)
-110
-120
-120
-130
-110
-120
-120
-130
10 KHz
100 KHz
≥1 MHz
2000
1%
2000
1%
RREF
—
—
—
—
—
Ω
Arria V GX, GT, SX, and ST Device Datasheet
December 2013 Altera Corporation
INTEL [ INTEL ]
