Processor Configuration Registers
2.6.11
SUBUSN—Subordinate Bus Number Register
This register identifies the subordinate bus (if any) that resides at the level below PCI
Express-G. This number is programmed by the PCI configuration software to allow
mapping of configuration cycles to PCI Express-G.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/PCI
1Ah
00h
RW
8 bits
Size:
Reset
Value
RST/
PWR
Bit
Access
Description
Subordinate Bus Number (BUSN)
This register is programmed by configuration software with the
number of the highest subordinate bus that lies behind the
processor root port bridge. When only a single PCI device resides
on the PCI Express-G segment, this register will contain the same
value as the SBUSN1 register.
7:0
RW
00h
Uncore
94
Datasheet, Volume 2
INTEL [ INTEL ]
