Processor Configuration Registers
2.21.28 IVA_REG—Invalidate Address Register
This register provides the DMA address whose corresponding IOTLB entry needs to be
invalidated through the corresponding IOTLB Invalidate register. This register is a
write-only register.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/VC0PREMAP
100–107h
0000000000000000h
RW
64 bits
00000000h
Size:
BIOS Optimal Default
Reset
Value
RST/
PWR
Bit
Access
Description
63:39
RO
0h
0000000h
0h
Reserved (RSVD)
Address (ADDR)
Software provides the DMA address that needs to be page-
selectively invalidated. To make a page-selective invalidation
request to hardware, software must first write the appropriate
fields in this register, and then issue the appropriate page-
selective invalidate command through the IOTLB_REG. Hardware
ignores bits 63: N, where N is the maximum guest address width
(MGAW) supported.
38:12
11:7
RW
RO
Uncore
Reserved (RSVD)
Invalidation Hint (IH)
The field provides hint to hardware about preserving or flushing
the non-leaf (page-directory) entries that may be cached in
hardware:
0 = Software may have modified both leaf and non-leaf page-
table entries corresponding to mappings specified in the
ADDR and AM fields. On a page-selective invalidation
request, hardware must flush both the cached leaf and non-
leaf page-table entries corresponding to the mappings
specified by ADDR and AM fields.
6
RW
0h
Uncore
1 = Software has not modified any non-leaf page-table entries
corresponding to mappings specified in the ADDR and AM
fields. On a page-selective invalidation request, hardware
may preserve the cached non-leaf page-table entries
corresponding to mappings specified by ADDR and AM fields.
Address Mask (AM)
The value in this field specifies the number of low-order bits of
the ADDR field that must be masked for the invalidation
operation. This field enables software to request invalidation of
contiguous mappings for size-aligned regions. For example:
Mask
Value
ADDR bits
masked
None
Pages
invalidated
0
1
2
3
4
1
2
4
8
12
5:0
RW
00h
Uncore
13:12
14:12
15:12
16
When invalidating mappings for super-pages, software must
specify the appropriate mask value. For example, when
invalidating mapping for a 2 MB page, software must specify an
address mask value of at least 9.
Hardware implementations report the maximum supported mask
value through the Capability register.
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Datasheet, Volume 2
INTEL [ INTEL ]
