Processor Configuration Registers
2.19.1
MEM_TRML_ESTIMATION_CONFIG—Memory
Thermal Estimation Configuration Register
This register contains configuration regarding VTS temperature estimation calculations
that are done by PCODE.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/MCHBAR PCU
5880–5883h
CA9171E7h
RW
Size:
32 bits
BIOS Optimal Default
CA9171E7h
Reset
Value
RST/
PWR
Bit
Access
Description
VTS multiplier (VTS_MULTIPLIER)
The VTS multiplier serves as a multiplier for the translation of the
memory BW to temperature. The units are given in
1 / power(2,44).
31:22
RW
10Eh
0C8h
Uncore
Uncore
VTS time constant (VTS_TIME_CONSTANT)
This factor is relevant only for BW based temperature estimation.
It is equal to "1 minus alpha".
21:12
RW
The value of the time constant (1 – alpha) is determined by
VTS_TIME_CONSTANT / power(2,25) per 1 mSec.
11
10:4
3
RO
RW
RO
0h
32h
0h
Reserved (RSVD)
VTS offset adder (VTS_OFFSET)
The offset is intended to provide a temperature proxy offset, so
the option of having a fixed adder to VTS output is available.
Uncore
Reserved (RSVD)
Disable EXTTS# (DISABLE_EXTTS)
When set, the processor will ignore the EXTTS# signal status that
it receives from the PCH through PM_SYNC messaging.
0 = Enable
1 = Disable
2
1
RW
RW
1b
0b
Uncore
Uncore
Disable virtual Temperature Sensor (DISABLE_VTS)
When set, the processor will ignore the VTS.
0 = Enable
1 = Disable
Disable PECI Injected Temperature
(DISABLE_PECI_INJECT_TEMP)
When set, the processor will ignore any DRAM temperature
written to it over the PECI bus.
0
RW
0b
Uncore
0 = Enable
1 = Disable
Datasheet, Volume 2
297
INTEL [ INTEL ]
