Processor Configuration Registers
2.19
PCU MCHBAR Registers
Table 2-22. PCU MCHBAR Register Address Map
Address
Offset
Register Symbol
Register Name
Reset Value
Access
0–587Fh
RSVD
Reserved
—
—
RW
RW
RW
—
Memory Thermal Estimation
Configuration
MEM_TRML_ESTI
MATION_CONFIG
5880–5883h
5884–5887h
5888–588Bh
588C–589Fh
58A0–58A3h
CA9171E7h
00000000h
00E4DAD0h
—
RSVD
Reserved
Memory Thermal Thresholds
Configuration
MEM_TRML_THRE
SHOLDS_CONFIG
RSVD
Reserved
MEM_TRML_STAT Memory Thermal Status Report
US_REPORT
00000000h
RO-V
Memory Thermal Temperature
Report
MEM_TRML_TEMP
ERATURE_REPORT
58A4–58A7h
58A8–58ABh
00000000h
00000000h
RO-V
RW
MEM_TRML_INTER Memory Thermal Interrupt
RUPT
58AC–5947h
5948–594Bh
594C–5993h
5994–5997h
5998–599Bh
599C–5C1Fh
RSVD
GT_PERF_STATUS GT Performance Status
RSVD Reserved
RP_STATE_LIMITS RP-State Limitations
Reserved
—
—
RO-V
—
00000000h
—
000000FFh
00000000h
—
RW
RP_STATE_CAP
RSVD
RP State Capability
Reserved
RO-FW
—
PCU_MMIO_FREQ PCU MMIO Frequency Clipping
5C20–5C23h
5C24–5C27h
_CLIPPING_CAUS
E_STATUS
00000000h
RW
RW
Cause Status
PCU_MMIO_FREQ PCU MMIO Frequency Clipping
_CLIPPING_CAUS
E_LOG
00000000h
—
Cause Log
5C28–5D0Fh
5D10–5D17h
5D18–5F03h
RSVD
SSKPD
RSVD
Reserved
—
RWS, RW
—
Sticky Scratchpad Data
00000000000
00000h
Reserved
—
296
Datasheet, Volume 2
INTEL [ INTEL ]
