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326769-002 参数 Datasheet PDF下载

326769-002图片预览
型号: 326769-002
PDF下载: 下载PDF文件 查看货源
内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
2.16.4  
PM_SREF_config—Self Refresh Configuration Register  
This is a self refresh mode control register – defines if and when DDR can go into SR.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/MCHBAR_MCMAIN  
5060–5063h  
000100FFh  
RW-L  
Size:  
32 bits  
BIOS Optimal Default  
0000h  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
31:16  
RO  
0h  
Reserved (RSVD)  
Idle timer init value (Idle_timer)  
This value is used when the “SREF_enable” field is set. It defines  
the number of cycles that there should not be any transaction in  
order to enter self-refresh. It is programmable 1 to 64K-1. In  
DCLK=800 it determines time of up to 82 us.  
15:0  
RW-L  
00FFh  
Uncore  
256  
Datasheet, Volume 2