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326769-002 参数 Datasheet PDF下载

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型号: 326769-002
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内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
2.10.42 SLOTCTL—Slot Control Register  
Note:  
PCI Express* Hot-Plug is not supported on the processor.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/6/0/PCI  
B8–B9h  
0000h  
RO  
16 bits  
0h  
Size:  
BIOS Optimal Default  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
15:13  
RO  
0h  
Reserved (RSVD)  
Reserved for Data Link Layer State Changed Enable  
(DLLSCE)  
If the Data Link Layer Link Active capability is implemented, when  
set to 1b, this field enables software notification when Data Link  
Layer Link Active field is changed.  
If the Data Link Layer Link Active capability is not implemented,  
this bit is permitted to be read-only with a value of 0b.  
12  
11  
RO  
RO  
0b  
Uncore  
Uncore  
Reserved for Electromechanical Interlock Control (EIC)  
If an Electromechanical Interlock is implemented, a write of 1b to  
this field causes the state of the interlock to toggle. A write of 0b  
to this field has no effect. A read to this register always returns a  
0.  
0b  
Reserved for Power Controller Control (PCC)  
If a Power Controller is implemented, this field when written sets  
the power state of the slot per the defined encodings. Reads of  
this field must reflect the value from the latest write, even if the  
corresponding hot-plug command is not complete, unless  
software issues a write without waiting for the previous command  
to complete in which case the read value is undefined.  
Depending on the form factor, the power is turned on/off either to  
the slot or within the adapter. Note that in some cases the power  
controller may autonomously remove slot power or not respond to  
a power-up request based on a detected fault condition,  
independent of the Power Controller Control setting.  
10  
RO  
0b  
Uncore  
The defined encodings are:  
0 = Power On  
1 = Power Off  
If the Power Controller Implemented field in the Slot Capabilities  
register is set to 0b, then writes to this field have no effect and  
the read value of this field is undefined.  
Reserved Power Indicator Control (PIC)  
If a Power Indicator is implemented, writes to this field set the  
Power Indicator to the written state. Reads of this field must  
reflect the value from the latest write, even if the corresponding  
hot-plug command is not complete, unless software issues a write  
without waiting for the previous command to complete in which  
case the read value is undefined.  
9:8  
RO  
00b  
Uncore  
00 = Reserved  
01 = On  
10 = Blink  
11 = Off  
If the Power Indicator Present bit in the Slot Capabilities register  
is 0b, this field is permitted to be read-only with a value of 00b.  
198  
Datasheet, Volume 2