Processor Configuration Registers
2.8.4
PCISTS2—PCI Status Register
PCISTS is a 16-bit status register that reports the occurrence of a PCI compliant master
abort and PCI compliant target abort.
PCISTS also indicates the DEVSEL# timing that has been set by the IGD.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/2/0/PCI
6–7h
0090h
RO, RO-V
16 bits
0h
Size:
BIOS Optimal Default
Reset
Value
RST/
PWR
Bit
Access
Description
Detected Parity Error (DPE)
15
RO
0b
0b
0b
0b
Uncore
Uncore
Uncore
Uncore
Since the IGD does not detect parity, this bit is always hardwired
to 0.
Signaled System Error (SSE)
The IGD never asserts SERR#; therefore, this bit is hardwired to
0.
14
13
12
RO
RO
RO
Received Master Abort Status (RMAS)
The IGD never gets a Master Abort; therefore, this bit is
hardwired to 0.
Received Target Abort Status (RTAS)
The IGD never gets a Target Abort; therefore, this bit is
hardwired to 0.
Signaled Target Abort Status (STAS)
Hardwired to 0. The IGD does not use target abort semantics.
11
RO
RO
0b
Uncore
Uncore
DEVSEL Timing (DEVT)
N/A. These bits are hardwired to "00".
10:9
00b
Master Data Parity Error Detected (DPD)
8
7
RO
RO
0b
1b
Uncore
Uncore
Since Parity Error Response is hardwired to disabled (and the IGD
does not do any parity detection), this bit is hardwired to 0.
Fast Back-to-Back (FB2B)
Hardwired to 1. The IGD accepts fast back-to-back when the
transactions are not to the same agent.
User Defined Format (UDF)
Hardwired to 0.
6
5
RO
RO
0b
0b
Uncore
Uncore
66 MHz PCI Capable (C66)
N/A – Hardwired to 0.
Capability List (CLIST)
This bit is set to 1 to indicate that the register at 34h provides an
offset into the function's PCI Configuration Space containing a
pointer to the location of the first item in the list.
4
RO
1b
Uncore
Uncore
Interrupt Status (INTSTS)
This bit reflects the state of the interrupt in the device. Only
when the Interrupt Disable bit in the command register is a 0 and
this Interrupt Status bit is a 1, will the devices INTx# signal be
asserted.
3
RO-V
RO
0b
0h
2:0
Reserved (RSVD)
Datasheet, Volume 2
151
INTEL [ INTEL ]
